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include/device/device.h

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Remove old vendor,device struct members since we are now using the
device_id struct. 
Change declaration of dev_find_device to use device_id struct. 

device/device_util.c
Change dev_find_device to use device_id struct instead of vendor, device
parameters.
Add convenience function, dev_find_pci_device, to make it easier for
users. 

device/pci_device.c
Change uses of dev->vendor and dev->device to dev->id. 
Change prints of dev->vendor, dev->device to use the 
dev_id_string function. 

device/pci_rom.c
Change uses of dev->vendor and dev->device to dev->id. 

southbridge/amd/cs5536/cs5536.c
Change uses of dev_find_device to dev_find_pci_device

southbridge/amd/cs5536/dts
Add pciid of the cs5536

northbridge/amd/geodelx/dts
add pciid of the geodelx northbridge. 

util/x86emu/vm86.c
Change uses of dev_find_device to dev_find_pci_device

With these changes, the chipsetinit function now finds the southbridge
in the static tree, which is the first time this has worked in v3.
This success in turn means that the chipsetinit code is running for the
first time. 
We are still failing in "Finding PCI configuration type"

Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>


git-svn-id: svn://coreboot.org/repository/coreboot-v3@558 f3766cd6-281f-0410-b1cd-43a5c92072e9
This commit is contained in:
Carl-Daniel Hailfinger 2008-01-20 23:03:40 +00:00
commit 68b97a6034
8 changed files with 58 additions and 35 deletions
Download patch file Download diff file Expand all files Collapse all files

37
device/device_util.c
View file

@ -115,26 +115,51 @@ struct device *dev_find_slot_on_smbus(unsigned int bus, unsigned int addr)
/**
* Find a device of a given vendor and type.
*
* @param vendor Vendor ID (e.g. 0x8086 for Intel)
* @param device Device ID
* @param devid Pointer to device_id struct
* @param from Pointer to the device structure, used as a starting point
* in the linked list of all_devices, which can be 0 to start
* at the head of the list (i.e. all_devices).
* @return Pointer to the device struct.
*/
struct device *dev_find_device(unsigned int vendor, unsigned int device,
struct device *from)
struct device *dev_find_device(struct device_id *devid, struct device *from)
{
printk(BIOS_SPEW, "%s: find %s\n", __FUNCTION__, dev_id_string(devid));
if (!from)
from = all_devices;
else
from = from->next;
while (from && (from->vendor != vendor || from->device != device)) {
from = from->next;
for(;from;from = from->next){
printk(BIOS_SPEW, "Check %s\n", dev_id_string(&from->id));
if (id_eq(devid, &from->id))
break;
}
printk(BIOS_SPEW, "%sfound\n", from ? "" : "not ");
return from;
}
/**
* Find a PCI device of a given vendor and type.
* This is a convenience function since PCI device searches
* are by far the most common.
*
* @param vendor vendor number
* @param device device number
* @param from Pointer to the device structure, used as a starting point
* in the linked list of all_devices, which can be 0 to start
* at the head of the list (i.e. all_devices).
* @return Pointer to the device struct.
*/
struct device *dev_find_pci_device(u16 vendor, u16 device, struct device *from)
{
struct device_id id;
id.type = DEVICE_ID_PCI;
id.u.pci.vendor = vendor;
id.u.pci.device = device;
return dev_find_device(&id, from);
}
/**
* Find a device of a given class.
*

26
device/pci_device.c
View file

@ -824,7 +824,7 @@ static struct device_operations *get_pci_bridge_ops(struct device *dev)
static void set_pci_ops(struct device *dev)
{
struct constructor *c;
struct device_id id = {.type = DEVICE_ID_PCI };
struct device_id id;
if (dev->ops) {
printk(BIOS_SPEW, "%s: dev %p(%s) already has ops %p\n",
@ -832,9 +832,7 @@ static void set_pci_ops(struct device *dev)
return;
}
/* We need to make the ID in the device a device_id type. */
id.u.pci.vendor = dev->vendor;
id.u.pci.device = dev->device;
id = dev->id;
/* Look through the list of setup drivers and find one for
* this PCI device.
@ -842,9 +840,9 @@ static void set_pci_ops(struct device *dev)
c = find_constructor(&id);
if (c) {
dev->ops = c->ops;
printk(BIOS_SPEW, "%s id %s [%04x/%04x] %sops\n",
dev_path(dev), dev_id_string(&id), dev->vendor,
dev->device, (dev->ops->phase3_scan ? "bus " : ""));
printk(BIOS_SPEW, "%s id %s %sops\n",
dev_path(dev), dev_id_string(&id),
(dev->ops->phase3_scan ? "bus " : ""));
return;
}
@ -869,9 +867,9 @@ static void set_pci_ops(struct device *dev)
bad:
if (dev->enabled) {
printk(BIOS_ERR,
"%s [%04x/%04x/%06x] has unknown header "
"%s [%s/%06x] has unknown header "
"type %02x, ignoring.\n", dev_path(dev),
dev->vendor, dev->device, dev->class >> 8,
dev_id_string(&dev->id), dev->class >> 8,
dev->hdr_type);
}
}
@ -1027,8 +1025,9 @@ struct device *pci_probe_dev(struct device *dev, struct bus *bus,
dev->subsystem_device = pci_read_config16(dev, PCI_SUBSYSTEM_ID);
/* Store the interesting information in the device structure. */
dev->vendor = id & 0xffff;
dev->device = (id >> 16) & 0xffff;
dev->id.type = DEVICE_ID_PCI;
dev->id.u.pci.vendor = id & 0xffff;
dev->id.u.pci.device = (id >> 16) & 0xffff;
dev->hdr_type = hdr_type;
/* Class code, the upper 3 bytes of PCI_CLASS_REVISION. */
dev->class = class >> 8;
@ -1051,9 +1050,8 @@ struct device *pci_probe_dev(struct device *dev, struct bus *bus,
/* Display the device and error if we don't have some PCI operations
* for it.
*/
printk(BIOS_DEBUG, "%s [%04x/%04x] %s%s\n",
dev_path(dev),
dev->vendor, dev->device,
printk(BIOS_DEBUG, "%s [%s] %s%s\n",
dev_path(dev), dev_id_string(&dev->id),
dev->enabled ? "enabled" : "disabled",
dev->ops ? "" : " No operations");

2
device/pci_rom.c
View file

@ -83,7 +83,7 @@ struct rom_header *pci_rom_probe(struct device *dev)
printk(BIOS_SPEW, "PCI ROM Image, Vendor %04x, Device %04x,\n",
rom_data->vendor, rom_data->device);
if (dev->vendor != rom_data->vendor || dev->device != rom_data->device) {
if (dev->id.u.pci.vendor != rom_data->vendor || dev->id.u.pci.device != rom_data->device) {
printk(BIOS_ERR,
"Device or Vendor ID mismatch Vendor %04x, Device %04x\n",
rom_data->vendor, rom_data->device);

6
include/device/device.h
View file

@ -197,9 +197,6 @@ struct device {
struct device_path path;
struct device_id id;
char dtsname[MAX_DTSNAME_SIZE]; /* the name from the dts */
/* XXX remove this soon */
unsigned device, vendor;
/* XXX */
u16 status;
u8 revision;
u8 cache_line;
@ -266,7 +263,8 @@ void disable_children(struct bus *bus);
/* Helper functions */
struct device * find_dev_path(struct bus *parent, struct device_path *path);
struct device * alloc_find_dev(struct bus *parent, struct device_path *path, struct device_id *id);
struct device * dev_find_device (unsigned int vendor, unsigned int device, struct device * from);
struct device * dev_find_device (struct device_id *devid, struct device * from);
struct device *dev_find_pci_device(u16 vendor, u16 device, struct device *from);
struct device * dev_find_class (unsigned int class, struct device * from);
struct device * dev_find_slot (unsigned int bus, unsigned int devfn);
struct device * dev_find_slot_on_smbus (unsigned int bus, unsigned int addr);

3
northbridge/amd/geodelx/dts
View file

@ -19,6 +19,7 @@
*/
{
constructor = "geodelx_north_constructors";
constructor = "geodelx_north_constructors";
domainid = "PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_LXBRIDGE";
};

16
southbridge/amd/cs5536/cs5536.c
View file

@ -227,7 +227,7 @@ static void uarts_init(struct southbridge_amd_cs5536_config *sb)
u32 gpio_addr;
struct device *dev;
dev = dev_find_device(PCI_VENDOR_ID_AMD,
dev = dev_find_pci_device(PCI_VENDOR_ID_AMD,
PCI_DEVICE_ID_AMD_CS5536_ISA, 0);
gpio_addr = pci_read_config32(dev, PCI_BASE_ADDRESS_1);
@ -389,7 +389,7 @@ static void enable_USB_port4(struct southbridge_amd_cs5536_config *sb)
struct msr msr;
struct device *dev;
dev = dev_find_device(PCI_VENDOR_ID_AMD,
dev = dev_find_pci_device(PCI_VENDOR_ID_AMD,
PCI_DEVICE_ID_AMD_CS5536_EHCI, 0);
if (dev) {
/* Serial short detect enable */
@ -409,7 +409,7 @@ static void enable_USB_port4(struct southbridge_amd_cs5536_config *sb)
*(bar + HCCPARAMS) = 0x00005012;
}
dev = dev_find_device(PCI_VENDOR_ID_AMD,
dev = dev_find_pci_device(PCI_VENDOR_ID_AMD,
PCI_DEVICE_ID_AMD_CS5536_OTG, 0);
if (dev) {
bar = (u32 *) pci_read_config32(dev, PCI_BASE_ADDRESS_0);
@ -434,14 +434,14 @@ static void enable_USB_port4(struct southbridge_amd_cs5536_config *sb)
* - Set APU bit in uoc register
*/
if (sb->enable_USBP4_device) {
dev = dev_find_device(PCI_VENDOR_ID_AMD,
dev = dev_find_pci_device(PCI_VENDOR_ID_AMD,
PCI_DEVICE_ID_AMD_CS5536_UDC, 0);
if (dev) {
bar = (u32 *)pci_read_config32(dev, PCI_BASE_ADDRESS_0);
*(bar + UDCDEVCTL) |= UDC_SD_SET;
}
dev = dev_find_device(PCI_VENDOR_ID_AMD,
dev = dev_find_pci_device(PCI_VENDOR_ID_AMD,
PCI_DEVICE_ID_AMD_CS5536_OTG, 0);
if (dev) {
bar = (u32 *)pci_read_config32(dev, PCI_BASE_ADDRESS_0);
@ -451,12 +451,12 @@ static void enable_USB_port4(struct southbridge_amd_cs5536_config *sb)
}
/* Disable virtual PCI UDC and OTG headers. */
dev = dev_find_device(PCI_VENDOR_ID_AMD,
dev = dev_find_pci_device(PCI_VENDOR_ID_AMD,
PCI_DEVICE_ID_AMD_CS5536_UDC, 0);
if (dev)
pci_write_config32(dev, 0x7C, 0xDEADBEEF);
dev = dev_find_device(PCI_VENDOR_ID_AMD,
dev = dev_find_pci_device(PCI_VENDOR_ID_AMD,
PCI_DEVICE_ID_AMD_CS5536_OTG, 0);
if (dev)
pci_write_config32(dev, 0x7C, 0xDEADBEEF);
@ -479,7 +479,7 @@ void chipsetinit(void)
const struct msrinit *csi;
post_code(P80_CHIPSET_INIT);
dev = dev_find_device(PCI_VENDOR_ID_AMD,
dev = dev_find_pci_device(PCI_VENDOR_ID_AMD,
PCI_DEVICE_ID_AMD_CS5536_ISA, 0);
if (!dev) {
printk(BIOS_ERR, "%s: Could not find the south bridge!\n",

1
southbridge/amd/cs5536/dts
View file

@ -20,6 +20,7 @@
{
constructor = "cs5536_constructors";
pciid = "PCI_VENDOR_ID_AMD,PCI_DEVICE_ID_AMD_CS5536_ISA";
/* Interrupt enables for LPC bus. Each bit is an IRQ 0-15. */
lpc_serirq_enable = "0";

2
util/x86emu/vm86.c
View file

@ -645,7 +645,7 @@ pcibios(unsigned long *pedi, unsigned long *pesi, unsigned long *pebp,
vendorid = *pedx;
devindex = *pesi;
dev = 0;
while ((dev = dev_find_device(vendorid, devid, dev))) {
while ((dev = dev_find_pci_device(vendorid, devid, dev))) {
if (devindex <= 0)
break;
devindex--;