mb/google/rex/var/kanix: Add initial overridetree settings
Update initial overridetree settings, it's basically copied from karis. This patch includes: 1. USB port related settings 2. Display Port Configuration 3. DPTF settings 4. PCIE settings for NVME 5. Settings of MIPI camera HI556 6. Settings of ELAN9004 touchscreen 7. Settings of ELAN and PIXA touchpad 8. PCIE settings for WLAN card 9. Settings of NUVOTON FPMCU BUG=b:368501705 TEST=emerge-rex coreboot pass Change-Id: I468ca388f495b2e527841145f8162b21074058cc Signed-off-by: Tyler Wang <tyler.wang@quanta.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/85021 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Kapil Porwal <kapilporwal@google.com> Reviewed-by: Subrata Banik <subratabanik@google.com>
This commit is contained in:
Tyler Wang
Subrata Banik
parent
944e059806
commit
6821aff655
1 changed files with 499 additions and 2 deletions
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@ -1,6 +1,503 @@
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chip soc/intel/meteorlake
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device domain 0 on
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end
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register "usb2_ports[0]" = "USB2_PORT_TYPE_C(OC_SKIP)" # USB2_C1
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register "usb2_ports[1]" = "USB2_PORT_TYPE_C(OC_SKIP)" # USB2_C0
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register "usb2_ports[8]" = "USB2_PORT_MID(OC3)" # Type-A Port A0
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register "usb2_ports[9]" = "USB2_PORT_MID(OC_SKIP)" # M.2 Bluetooth
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register "usb3_ports[0]" = "USB3_PORT_DEFAULT(OC3)" # USB3/2 Type A port A0
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register "tcss_ports[0]" = "TCSS_PORT_DEFAULT(OC_SKIP)" # USB3_C0
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register "tcss_ports[2]" = "TCSS_PORT_DEFAULT(OC_SKIP)" # USB3_C1
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# Enable eDP in Port A
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register "ddi_port_A_config" = "1"
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# Enable HDMI in Port B
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register "ddi_port_B_config" = "0"
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# Enable Display Port Configuration
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register "ddi_ports_config" = "{
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[DDI_PORT_A] = DDI_ENABLE_HPD,
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[DDI_PORT_B] = DDI_ENABLE_HPD | DDI_ENABLE_DDC,
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[DDI_PORT_1] = DDI_ENABLE_HPD,
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[DDI_PORT_2] = DDI_ENABLE_HPD,
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[DDI_PORT_3] = DDI_ENABLE_HPD,
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[DDI_PORT_4] = DDI_ENABLE_HPD,
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}"
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register "serial_io_gspi_mode" = "{
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[PchSerialIoIndexGSPI0] = PchSerialIoDisabled,
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[PchSerialIoIndexGSPI1] = PchSerialIoPci,
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[PchSerialIoIndexGSPI2] = PchSerialIoDisabled,
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}"
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register "serial_io_i2c_mode" = "{
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[PchSerialIoIndexI2C0] = PchSerialIoPci,
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[PchSerialIoIndexI2C1] = PchSerialIoPci,
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[PchSerialIoIndexI2C2] = PchSerialIoDisabled,
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[PchSerialIoIndexI2C3] = PchSerialIoPci,
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[PchSerialIoIndexI2C4] = PchSerialIoPci,
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[PchSerialIoIndexI2C5] = PchSerialIoPci,
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}"
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# Intel Common SoC Config
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#+-------------------+---------------------------+
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#| Field | Value |
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#+-------------------+---------------------------+
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#| I2C0 | Audio and WFC |
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#| I2C1 | Touchscreen |
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#| I2C3 | Touchpad |
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#| I2C4 | cr50 TPM. Early init is |
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#| | required to set up a BAR |
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#| | for TPM communication |
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#| I2C5 | UFC, SAR1, SAR2, HPS |
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#+-------------------+---------------------------+
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register "common_soc_config" = "{
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.i2c[0] = {
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.speed = I2C_SPEED_FAST,
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.rise_time_ns = 400,
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.fall_time_ns = 350,
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.data_hold_time_ns = 50,
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},
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.i2c[1] = {
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.speed = I2C_SPEED_FAST,
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.rise_time_ns = 600,
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.fall_time_ns = 400,
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.data_hold_time_ns = 50,
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},
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.i2c[3] = {
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.speed = I2C_SPEED_FAST,
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.rise_time_ns = 600,
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.fall_time_ns = 400,
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.data_hold_time_ns = 50,
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},
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.i2c[4] = {
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.early_init = 1,
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.speed = I2C_SPEED_FAST,
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.rise_time_ns = 550,
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.fall_time_ns = 400,
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.data_hold_time_ns = 50,
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},
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.i2c[5] = {
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.speed = I2C_SPEED_FAST,
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.rise_time_ns = 900,
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.fall_time_ns = 400,
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.data_hold_time_ns = 50,
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},
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}"
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device domain 0 on
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device ref igpu on
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chip drivers/gfx/generic
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register "device_count" = "6"
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# DDIA for eDP
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register "device[0].name" = ""LCD0""
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register "device[0].type" = "panel"
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# DDIB for HDMI
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register "device[1].name" = ""DD01""
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# TCP0 (DP-1) for port C0
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register "device[2].name" = ""DD02""
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register "device[2].use_pld" = "true"
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register "device[2].pld" = "ACPI_PLD_TYPE_C(LEFT, LEFT, ACPI_PLD_GROUP(1, 1))"
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# TCP1 (DP-2) unused
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register "device[3].name" = ""DD03""
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# TCP2 (DP-3) for port C1
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register "device[4].name" = ""DD04""
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register "device[4].use_pld" = "true"
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register "device[4].pld" = "ACPI_PLD_TYPE_C(LEFT, RIGHT, ACPI_PLD_GROUP(2, 1))"
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# TCP3 (DP-4) unused
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register "device[5].name" = ""DD05""
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device generic 0 on end
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end
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end # Integrated Graphics Device
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device ref dtt on
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chip drivers/intel/dptf
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## sensor information
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register "options.tsr[0].desc" = ""DDR_SOC""
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register "options.tsr[1].desc" = ""Ambient""
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register "options.tsr[2].desc" = ""Charger""
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## Active Policy
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# FIXME: below values are initial reference values only
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register "policies.active" = "{
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[0] = {
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.target = DPTF_TEMP_SENSOR_0,
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.thresholds = {
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TEMP_PCT(75, 90),
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TEMP_PCT(70, 80),
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TEMP_PCT(65, 70),
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TEMP_PCT(60, 60),
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TEMP_PCT(55, 50),
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TEMP_PCT(50, 40),
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TEMP_PCT(45, 30),
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}
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},
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[1] = {
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.target = DPTF_TEMP_SENSOR_1,
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.thresholds = {
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TEMP_PCT(75, 90),
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TEMP_PCT(70, 80),
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TEMP_PCT(65, 70),
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TEMP_PCT(60, 60),
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TEMP_PCT(55, 50),
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TEMP_PCT(50, 40),
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TEMP_PCT(45, 30),
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}
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},
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[2] = {
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.target = DPTF_TEMP_SENSOR_2,
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.thresholds = {
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TEMP_PCT(75, 90),
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TEMP_PCT(70, 80),
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TEMP_PCT(65, 70),
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TEMP_PCT(60, 50),
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}
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}
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}"
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## Passive Policy
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# TODO: below values are initial reference values only
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register "policies.passive" = "{
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[0] = DPTF_PASSIVE(CPU, CPU, 95, 5000),
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[1] = DPTF_PASSIVE(CPU, TEMP_SENSOR_0, 80, 5000),
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[2] = DPTF_PASSIVE(CPU, TEMP_SENSOR_1, 80, 5000),
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[3] = DPTF_PASSIVE(CHARGER, TEMP_SENSOR_2, 75, 5000),
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}"
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## Critical Policy
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# TODO: below values are initial reference values only
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register "policies.critical" = "{
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[0] = DPTF_CRITICAL(CPU, 105, SHUTDOWN),
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[1] = DPTF_CRITICAL(TEMP_SENSOR_0, 85, SHUTDOWN),
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[2] = DPTF_CRITICAL(TEMP_SENSOR_1, 85, SHUTDOWN),
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[3] = DPTF_CRITICAL(TEMP_SENSOR_2, 85, SHUTDOWN),
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}"
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## Power Limits Control
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register "controls.power_limits" = "{
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.pl1 = {
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.min_power = 15000,
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.max_power = 15000,
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.time_window_min = 28 * MSECS_PER_SEC,
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.time_window_max = 32 * MSECS_PER_SEC,
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.granularity = 200,
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},
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.pl2 = {
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.min_power = 57000,
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.max_power = 57000,
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.time_window_min = 28 * MSECS_PER_SEC,
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.time_window_max = 32 * MSECS_PER_SEC,
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.granularity = 1000,
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}
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}"
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## Charger Performance Control (Control, mA)
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register "controls.charger_perf" = "{
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[0] = { 255, 3000 },
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[1] = { 24, 1500 },
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[2] = { 16, 1000 },
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[3] = { 8, 500 }
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}"
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## Fan Performance Control (Percent, Speed, Noise, Power)
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register "controls.fan_perf" = "{
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[0] = { 90, 6700, 220, 2200, },
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[1] = { 80, 5800, 180, 1800, },
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[2] = { 70, 5000, 145, 1450, },
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[3] = { 60, 4900, 115, 1150, },
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[4] = { 50, 3838, 90, 900, },
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[5] = { 40, 2904, 55, 550, },
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[6] = { 30, 2337, 30, 300, },
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[7] = { 20, 1608, 15, 150, },
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[8] = { 10, 800, 10, 100, },
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[9] = { 0, 0, 0, 50, }
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}"
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## Fan options
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register "options.fan.fine_grained_control" = "1"
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register "options.fan.step_size" = "2"
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device generic 0 alias dptf_policy on end
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end
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end
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device ref pcie_rp10 on
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# Enable SSD Card PCIE 10 using clk 8
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register "pcie_rp[PCIE_RP(10)]" = "{
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.clk_src = 8,
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.clk_req = 8,
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.flags = PCIE_RP_LTR | PCIE_RP_AER,
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}"
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chip soc/intel/common/block/pcie/rtd3
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register "is_storage" = "true"
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register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_A19)"
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register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_A20)"
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register "srcclk_pin" = "8"
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device generic 0 on end
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end
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end # PCIE10 SSD card
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device ref tbt_pcie_rp0 on end
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device ref tbt_pcie_rp2 on end
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device ref tcss_xhci on
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chip drivers/usb/acpi
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device ref tcss_root_hub on
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chip drivers/usb/acpi
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register "desc" = ""USB3 Type-C Port C0 (MLB)""
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register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
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register "use_custom_pld" = "true"
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register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, LEFT, ACPI_PLD_GROUP(1, 1))"
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device ref tcss_usb3_port0 on end
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end
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chip drivers/usb/acpi
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register "desc" = ""USB3 Type-C Port C1 (MLB)""
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register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
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register "use_custom_pld" = "true"
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register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, RIGHT, ACPI_PLD_GROUP(2, 1))"
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device ref tcss_usb3_port2 on end
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end
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end
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end
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end
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device ref tcss_dma0 on
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chip drivers/intel/usb4/retimer
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register "dfp[0].power_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_B22)"
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use tcss_usb3_port0 as dfp[0].typec_port
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device generic 0 on end
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end
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end
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device ref tcss_dma1 on
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chip drivers/intel/usb4/retimer
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register "dfp[0].power_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_B22)"
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use tcss_usb3_port2 as dfp[0].typec_port
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device generic 0 on end
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end
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end
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device ref xhci on
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chip drivers/usb/acpi
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device ref xhci_root_hub on
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chip drivers/usb/acpi
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register "desc" = ""USB2 Type-C Port C1 (MLB)""
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register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
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register "use_custom_pld" = "true"
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register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, RIGHT, ACPI_PLD_GROUP(2, 1))"
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device ref usb2_port1 on end
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end
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chip drivers/usb/acpi
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register "desc" = ""USB2 Type-C Port C0 (MLB)""
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register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
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register "use_custom_pld" = "true"
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register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, LEFT, ACPI_PLD_GROUP(1, 1))"
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device ref usb2_port2 on end
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end
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chip drivers/usb/acpi
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register "desc" = ""USB2 Type-A Port A0 (DB)""
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register "type" = "UPC_TYPE_A"
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register "use_custom_pld" = "true"
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register "custom_pld" = "ACPI_PLD_TYPE_A(RIGHT, RIGHT, ACPI_PLD_GROUP(3, 1))"
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device ref usb2_port9 on end
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end
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chip drivers/usb/acpi
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register "desc" = ""USB2 Bluetooth""
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register "type" = "UPC_TYPE_INTERNAL"
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register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_B01)"
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device ref usb2_port10 on end
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end
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chip drivers/usb/acpi
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register "desc" = ""USB3 Type-A Port A0 (DB)""
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register "type" = "UPC_TYPE_USB3_A"
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register "use_custom_pld" = "true"
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register "custom_pld" = "ACPI_PLD_TYPE_A(RIGHT, RIGHT, ACPI_PLD_GROUP(3, 1))"
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device ref usb3_port1 on end
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end
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end
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end
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end
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device ref ipu on
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chip drivers/intel/mipi_camera
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register "acpi_uid" = "0x50000"
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register "acpi_name" = ""IPU0""
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register "device_type" = "INTEL_ACPI_CAMERA_CIO2"
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register "cio2_num_ports" = "1"
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register "cio2_lanes_used" = "{2}" # 2 CSI Camera lanes are used
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register "cio2_lane_endpoint[0]" = ""^I2C5.CAM0""
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register "cio2_prt[0]" = "4"
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device generic 0 on end
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end
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end
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device ref i2c0 on end #I2C0
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device ref i2c1 on
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chip drivers/i2c/hid
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register "generic.hid" = ""ELAN9004""
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register "generic.desc" = ""ELAN Touchscreen""
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register "generic.irq" = "ACPI_IRQ_LEVEL_LOW(GPP_C07_IRQ)"
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register "generic.detect" = "1"
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register "generic.reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C01)"
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register "generic.reset_delay_ms" = "150"
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register "generic.reset_off_delay_ms" = "1"
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register "generic.enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_C00)"
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register "generic.enable_delay_ms" = "6"
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register "generic.enable_off_delay_ms" = "30"
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register "generic.stop_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C06)"
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register "generic.stop_off_delay_ms" = "1"
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register "generic.has_power_resource" = "1"
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register "hid_desc_reg_offset" = "0x01"
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device i2c 0x10 on end
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end
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end
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device ref i2c3 on
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chip drivers/i2c/generic
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register "hid" = ""ELAN0000""
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register "desc" = ""ELAN Touchpad""
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register "irq" = "ACPI_IRQ_WAKE_LEVEL_LOW(GPP_B00_IRQ)"
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register "wake" = "GPE0_DW0_00"
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register "detect" = "1"
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device i2c 15 on end
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end
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chip drivers/i2c/hid
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register "generic.hid" = ""PIXA2305""
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register "generic.desc" = ""PIXA Touchpad""
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register "generic.irq" = "ACPI_IRQ_WAKE_LEVEL_LOW(GPP_B00_IRQ)"
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register "generic.wake" = "GPE0_DW0_00"
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register "generic.detect" = "1"
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register "hid_desc_reg_offset" = "0x20"
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device i2c 68 on end
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end
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end
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device ref i2c4 on
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chip drivers/i2c/tpm
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register "hid" = ""GOOG0005""
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register "irq" = "ACPI_IRQ_EDGE_LOW(GPP_E03_IRQ)"
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device i2c 50 on end
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end
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end
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device ref i2c5 on
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chip drivers/intel/mipi_camera
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register "acpi_hid" = ""INT3537""
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register "acpi_uid" = "0"
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register "acpi_name" = ""CAM0""
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register "chip_name" = ""Hi-556 Camera""
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register "device_type" = "INTEL_ACPI_CAMERA_SENSOR"
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register "has_power_resource" = "1"
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register "ssdb.lanes_used" = "2"
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register "ssdb.link_used" = "1"
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register "num_freq_entries" = "1"
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register "link_freq[0]" = "437 * MHz"
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register "remote_name" = ""IPU0""
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register "max_dstate_for_probe" = "ACPI_DEVICE_SLEEP_D3_COLD"
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#Controls
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register "gpio_panel.gpio[0].gpio_num" = "GPP_A11" #EN_UCAM_SENR_PWR
|
||||
register "gpio_panel.gpio[1].gpio_num" = "GPP_B09" #EN_FCAM_PWR
|
||||
register "gpio_panel.gpio[2].gpio_num" = "GPP_V23" #UCAM_RST_L
|
||||
register "clk_panel.clks[0].clknum" = "IMGCLKOUT_3"
|
||||
register "clk_panel.clks[0].freq" = "FREQ_19_2_MHZ"
|
||||
|
||||
#_ON
|
||||
register "on_seq.ops_cnt" = "5"
|
||||
register "on_seq.ops[0]" = "SEQ_OPS_CLK_ENABLE(0, 0)"
|
||||
register "on_seq.ops[1]" = "SEQ_OPS_GPIO_ENABLE(0, 5)"
|
||||
register "on_seq.ops[2]" = "SEQ_OPS_GPIO_ENABLE(1, 5)"
|
||||
register "on_seq.ops[3]" = "SEQ_OPS_GPIO_DISABLE(2, 5)"
|
||||
register "on_seq.ops[4]" = "SEQ_OPS_GPIO_ENABLE(2, 5)"
|
||||
|
||||
#_OFF
|
||||
register "off_seq.ops_cnt" = "4"
|
||||
register "off_seq.ops[0]" = "SEQ_OPS_CLK_DISABLE(0, 0)"
|
||||
register "off_seq.ops[1]" = "SEQ_OPS_GPIO_DISABLE(2, 0)"
|
||||
register "off_seq.ops[2]" = "SEQ_OPS_GPIO_DISABLE(1, 0)"
|
||||
register "off_seq.ops[3]" = "SEQ_OPS_GPIO_DISABLE(0, 0)"
|
||||
device i2c 20 on end
|
||||
end
|
||||
chip drivers/intel/mipi_camera
|
||||
register "acpi_hid" = "ACPI_DT_NAMESPACE_HID"
|
||||
register "acpi_uid" = "1"
|
||||
register "acpi_name" = ""NVM0""
|
||||
register "chip_name" = ""ST M24C64X""
|
||||
register "device_type" = "INTEL_ACPI_CAMERA_NVM"
|
||||
|
||||
register "nvm_size" = "0x2000"
|
||||
register "nvm_pagesize" = "1"
|
||||
register "nvm_readonly" = "1"
|
||||
register "nvm_width" = "0x10"
|
||||
register "nvm_compat" = ""atmel,24c64""
|
||||
|
||||
register "max_dstate_for_probe" = "ACPI_DEVICE_SLEEP_D0"
|
||||
|
||||
register "has_power_resource" = "1"
|
||||
|
||||
#Controls
|
||||
register "gpio_panel.gpio[0].gpio_num" = "GPP_B09" #EN_FCAM_PWR
|
||||
|
||||
#_ON
|
||||
register "on_seq.ops_cnt" = "1"
|
||||
register "on_seq.ops[0]" = "SEQ_OPS_GPIO_ENABLE(0, 0)"
|
||||
|
||||
#_OFF
|
||||
register "off_seq.ops_cnt" = "1"
|
||||
register "off_seq.ops[0]" = "SEQ_OPS_GPIO_DISABLE(0, 0)"
|
||||
|
||||
device i2c 50 on end
|
||||
end
|
||||
end #I2C5
|
||||
device ref pcie_rp5 on
|
||||
# Enable WLAN Card PCIE 5 using clk 5
|
||||
register "pcie_rp[PCH_RP(5)]" = "{
|
||||
.clk_src = 5,
|
||||
.clk_req = 5,
|
||||
.flags = PCIE_RP_HOTPLUG | PCIE_RP_LTR | PCIE_RP_AER,
|
||||
}"
|
||||
chip drivers/wifi/generic
|
||||
register "wake" = "GPE0_DW2_09"
|
||||
register "add_acpi_dma_property" = "true"
|
||||
use usb2_port10 as bluetooth_companion
|
||||
device pci 00.0 on end
|
||||
end
|
||||
chip soc/intel/common/block/pcie/rtd3
|
||||
register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_E22)"
|
||||
register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_F08)"
|
||||
register "srcclk_pin" = "5"
|
||||
device generic 0 on end
|
||||
end
|
||||
end #PCIE5 WLAN card
|
||||
device ref gspi1 on
|
||||
chip drivers/spi/acpi
|
||||
register "name" = ""CRFP""
|
||||
register "hid" = "ACPI_DT_NAMESPACE_HID"
|
||||
register "uid" = "1"
|
||||
register "compat_string" = ""google,cros-ec-spi""
|
||||
register "irq" = "ACPI_IRQ_WAKE_LEVEL_LOW(GPP_E10_IRQ)"
|
||||
register "wake" = "GPE0_DW1_10"
|
||||
register "has_power_resource" = "1"
|
||||
register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C23)"
|
||||
register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_B11)"
|
||||
register "enable_delay_ms" = "3"
|
||||
device spi 0 on end
|
||||
end # FPMCU
|
||||
end
|
||||
device ref soc_espi on
|
||||
chip ec/google/chromeec
|
||||
use conn0 as mux_conn[0]
|
||||
use conn1 as mux_conn[1]
|
||||
device pnp 0c09.0 on end
|
||||
end
|
||||
end
|
||||
device ref pmc hidden
|
||||
chip drivers/intel/pmc_mux
|
||||
device generic 0 on
|
||||
chip drivers/intel/pmc_mux/conn
|
||||
use usb2_port2 as usb2_port
|
||||
use tcss_usb3_port0 as usb3_port
|
||||
device generic 0 alias conn0 on end
|
||||
end
|
||||
chip drivers/intel/pmc_mux/conn
|
||||
use usb2_port1 as usb2_port
|
||||
use tcss_usb3_port2 as usb3_port
|
||||
device generic 1 alias conn1 on end
|
||||
end
|
||||
end
|
||||
end
|
||||
end
|
||||
device ref hda on end
|
||||
end
|
||||
end
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue