erebion/coreboot
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syncing up for epia-m

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This commit is contained in:
Ronald G. Minnich 2004-04-15 23:39:37 +00:00
commit 673a9e5063
3 changed files with 31 additions and 0 deletions
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2
src/mainboard/via/epia-m/Config
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@ -14,6 +14,8 @@ mainboardinit southbridge/via/vt8235/setup_ethernet.inc
#mainboardinit mainboard/via/epia-m/dumpdev.inc
#mainboardinit mainboard/via/epia-m/do_dumpdev.inc
#mainboardinit southbridge/via/vt8235/setup_misc.inc
mainboardinit mainboard/via/epia-m/smbus.inc
mainboardinit mainboard/via/epia-m/earlysetup.inc
mainboardinit northbridge/via/vt8623/raminit.inc
#mainboardinit mainboard/via/epia-m/do_dumpdev.inc
# mainboardinit ram/dump_northbridge.inc

6
src/mainboard/via/epia-m/example.config
View file

@ -12,6 +12,8 @@ option SERIAL_CONSOLE=1
#option SERIAL_POST=1
#option TTYS0_BAUD=115200
# option TTYS0_BAUD=57600
# for VGA support (optional)
option HAVE_FRAMEBUFFER=1
option CONFIG_VGABIOS=1
option CONFIG_REALMODE_IDT=1
@ -19,6 +21,9 @@ dir src/bioscall
option CONFIG_PCIBIOS=1
option VGABIOS_START=0xfffe0000
addaction romimage dd if=../vgabios.bin of=romimage bs=65536 seek=2 conv=sync conv=notrunc
# end VGA support
option CONFIG_EPIAMVERSIONSTRING="5.0.0E-" __DATE__ " " __TIME__
target /ram/freebios/obj
payload /code/bootfiles/etherboot/via6105m.ebi
@ -42,3 +47,4 @@ option USE_ELF_BOOT=1
# Use Etherboot as our payload
payload /opt/cwlinux/etherboot/src/bin32/via-rhine.ebi
# payload /opt/cwlinux/memtest86/memtest

23
src/southbridge/via/vt8235/southbridge.c
View file

@ -110,6 +110,9 @@ void southbridge_fixup()
/* IDE controller */
dev1 = pci_find_device(PCI_VENDOR_ID_VIA, 0x0571, 0);
/* ACPI controller */
devpwr = pci_find_device(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_8233A, 0);
/* enable the internal I/O decode */
enables = pci_read_config_byte(dev0, 0x6C, &enables);
enables |= 0x80;
@ -170,6 +173,26 @@ void southbridge_fixup()
/* dma */
pci_write_config_byte(dev0, 0x53, 0x00);
/* these were part of a patch but are commented out? -- RGM */
/* // Set ACPI base address to IO 0x4000
pci_write_config_dword(devpwr, 0x48, 0x4001);
// Enable ACPI access (and setup like award)
pci_write_config_byte(devpwr, 0x41, 0x84);
// Set hardware monitor base address to IO 0x6000
pci_write_config_dword(devpwr, 0x70, 0x6001);
// Enable hardware monitor (and setup like award)
pci_write_config_byte(devpwr, 0x74, 0x01);
// set IO base address to 0x5000
pci_write_config_dword(devpwr, 0x90, 0x5001);
// Enable SMBus
pci_write_config_byte(devpwr, 0xd2, 0x01);
*/
#if (!ENABLE_IDE_NATIVE_MODE)
/* Use compatability mode - per award bios */
pci_write_config_dword(dev1, 0x10, 0x0);