From 66a3f2a1b14eb8d7bf0e5f1233c2ea97962a6f3e Mon Sep 17 00:00:00 2001
From: Kilian Krause <kilian.krause@siemens.com>
Date: Wed, 11 Jun 2025 15:30:53 +0200
Subject: [PATCH] mb/siemens/mc_rpl: Disable SaGv

Disable SaGv at baseboard level to improve realtime performance.

Change-Id: I0fd587aa8beb0c86ba88553cfeddac786b4c8948
Signed-off-by: Kilian Krause <kilian.krause@siemens.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/88953
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Mario Scheithauer <mario.scheithauer@siemens.com>
---
 src/mainboard/siemens/mc_rpl/devicetree.cb | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/mainboard/siemens/mc_rpl/devicetree.cb b/src/mainboard/siemens/mc_rpl/devicetree.cb
index fdd62466aa..1d7eec4a1f 100644
--- a/src/mainboard/siemens/mc_rpl/devicetree.cb
+++ b/src/mainboard/siemens/mc_rpl/devicetree.cb
@@ -11,7 +11,7 @@ chip soc/intel/alderlake
 	# FSP configuration
 
 	# Sagv Configuration
-	register "sagv" = "SaGv_Enabled"
+	register "sagv" = "SaGv_Disabled"
 
 	register "s0ix_enable" = "true"
 	register "dptf_enable" = "true"