diff --git a/src/mainboard/siemens/mc_rpl/devicetree.cb b/src/mainboard/siemens/mc_rpl/devicetree.cb
index fdd62466aa..1d7eec4a1f 100644
--- a/src/mainboard/siemens/mc_rpl/devicetree.cb
+++ b/src/mainboard/siemens/mc_rpl/devicetree.cb
@@ -11,7 +11,7 @@ chip soc/intel/alderlake
 	# FSP configuration
 
 	# Sagv Configuration
-	register "sagv" = "SaGv_Enabled"
+	register "sagv" = "SaGv_Disabled"
 
 	register "s0ix_enable" = "true"
 	register "dptf_enable" = "true"