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vc/amd/fsp/glinda: Update SMBIOS Type 17 information

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Update values for glinda SOC.

Signed-off-by: Maximilian Brune <maximilian.brune@9elements.com>
Change-Id: I02110647db86d7ff23f3ea3640dd531c7954ca42
Reviewed-on: https://review.coreboot.org/c/coreboot/+/87585
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
This commit is contained in:
Maximilian Brune 2025-04-16 20:55:21 +02:00 • committed by Matt DeVillier
commit 66873a3812
1 changed files with 3 additions and 3 deletions
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6
src/vendorcode/amd/fsp/glinda/soc_dmi_info.h
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@ -8,9 +8,9 @@
#ifndef SOC_DMI_INFO_H
#define SOC_DMI_INFO_H
#define AGESA_STRUCT_SOCKET_COUNT 2 ///< Number of sockets in AGESA FSP DMI T17 table
#define AGESA_STRUCT_CHANNELS_PER_SOCKET 8 ///< Channels per socket in AGESA FSP DMI T17 table
#define AGESA_STRUCT_DIMMS_PER_CHANNEL 4 ///< DIMMs per channel in AGESA FSP DMI T17 table
#define AGESA_STRUCT_SOCKET_COUNT 4 ///< Number of sockets in AGESA FSP DMI T17 table
#define AGESA_STRUCT_CHANNELS_PER_SOCKET 16 ///< Channels per socket in AGESA FSP DMI T17 table
#define AGESA_STRUCT_DIMMS_PER_CHANNEL 2 ///< DIMMs per channel in AGESA FSP DMI T17 table
#define AGESA_STRUCT_PART_NUMBER_SIZE 31
#define SMBIOS_3_2_3_3_SUPPORT 1