soc/mediatek: Extract DPM common code
Move function declarations to dpm_common.h, which is shared for both dpm_v1 and dpm_v2. Add a new function dpm_init_mcu() to the header to reduce duplicate code in dpm_v1.c, dpm_v2.c and dpm_4ch.c. BUG=none TEST=emerge-skywalker coreboot BRANCH=none Change-Id: I8d6318e9c3c4570cb8f3ff64242fc414770db653 Signed-off-by: Yu-Ping Wu <yupingso@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/87667 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Yidi Lin <yidilin@google.com>
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11 changed files with 50 additions and 44 deletions
21
src/soc/mediatek/common/dpm.c
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21
src/soc/mediatek/common/dpm.c
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@ -0,0 +1,21 @@
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/* SPDX-License-Identifier: GPL-2.0-only */
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#include <soc/dpm_common.h>
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#include <soc/mcu_common.h>
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#include <soc/symbols.h>
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int dpm_init_mcu(struct mtk_mcu *mcu_list)
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{
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struct mtk_mcu *mcu = mcu_list;
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while (mcu->firmware_name) {
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mcu->load_buffer = _dram_dma;
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mcu->buffer_size = REGION_SIZE(dram_dma);
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if (mtk_init_mcu(mcu))
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return -1;
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mcu++;
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}
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return 0;
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}
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@ -6,7 +6,6 @@
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#include <soc/dpm_v1.h>
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#include <soc/dramc_soc.h>
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#include <soc/spm.h>
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#include <soc/symbols.h>
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static struct dpm_regs *const mtk_dpm2 = (void *)DPM_CFG_BASE2;
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@ -62,6 +61,7 @@ static struct mtk_mcu dpm_mcu_4ch[] = {
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.priv = mtk_dpm2,
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.reset = dpm_reset,
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},
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{},
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};
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int dpm_4ch_init(void)
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@ -74,16 +74,5 @@ int dpm_4ch_init(void)
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int dpm_4ch_para_setting(void)
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{
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int i;
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struct mtk_mcu *dpm;
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for (i = 0; i < ARRAY_SIZE(dpm_mcu_4ch); i++) {
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dpm = &dpm_mcu_4ch[i];
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dpm->load_buffer = _dram_dma;
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dpm->buffer_size = REGION_SIZE(dram_dma);
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if (mtk_init_mcu(dpm))
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return -1;
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}
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return 0;
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return dpm_init_mcu(dpm_mcu_4ch);
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}
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@ -3,7 +3,6 @@
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#include <device/mmio.h>
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#include <soc/dpm_v1.h>
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#include <soc/mcu_common.h>
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#include <soc/symbols.h>
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static struct mtk_mcu dpm_mcu[] = {
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{
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@ -16,6 +15,7 @@ static struct mtk_mcu dpm_mcu[] = {
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.priv = mtk_dpm,
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.reset = dpm_reset,
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},
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{},
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};
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void dpm_reset(struct mtk_mcu *mcu)
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@ -32,9 +32,6 @@ void dpm_reset(struct mtk_mcu *mcu)
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int dpm_init(void)
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{
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int i;
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struct mtk_mcu *dpm;
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if (CONFIG(DPM_FOUR_CHANNEL))
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if (dpm_4ch_init())
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return -1;
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@ -42,13 +39,8 @@ int dpm_init(void)
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/* config DPM SRAM layout */
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clrsetbits32(&mtk_dpm->sw_rstn, DPM_MEM_RATIO_MASK, DPM_MEM_RATIO_CFG1);
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for (i = 0; i < ARRAY_SIZE(dpm_mcu); i++) {
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dpm = &dpm_mcu[i];
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dpm->load_buffer = _dram_dma;
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dpm->buffer_size = REGION_SIZE(dram_dma);
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if (mtk_init_mcu(dpm))
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return -1;
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}
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if (dpm_init_mcu(dpm_mcu))
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return -1;
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if (CONFIG(DPM_FOUR_CHANNEL))
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if (dpm_4ch_para_setting())
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@ -3,7 +3,6 @@
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#include <device/mmio.h>
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#include <soc/dpm_v2.h>
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#include <soc/mcu_common.h>
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#include <soc/symbols.h>
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static struct mtk_mcu dpm_mcu[] = {
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{
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@ -15,6 +14,7 @@ static struct mtk_mcu dpm_mcu[] = {
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.run_address = (void *)DPM_PM_SRAM_BASE,
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.reset = dpm_reset,
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},
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{},
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};
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void dpm_reset(struct mtk_mcu *mcu)
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@ -25,19 +25,12 @@ void dpm_reset(struct mtk_mcu *mcu)
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int dpm_init(void)
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{
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int i;
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struct mtk_mcu *dpm;
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u32 dramc_wbr_backup = read32p(DRAMC_WBR);
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setbits32p(DRAMC_WBR, ENABLE_DRAMC_WBR_MASK);
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for (i = 0; i < ARRAY_SIZE(dpm_mcu); i++) {
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dpm = &dpm_mcu[i];
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dpm->load_buffer = _dram_dma;
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dpm->buffer_size = REGION_SIZE(dram_dma);
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if (mtk_init_mcu(dpm))
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return -1;
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}
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if (dpm_init_mcu(dpm_mcu))
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return -1;
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write32p(DRAMC_WBR, dramc_wbr_backup);
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15
src/soc/mediatek/common/include/soc/dpm_common.h
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15
src/soc/mediatek/common/include/soc/dpm_common.h
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@ -0,0 +1,15 @@
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/* SPDX-License-Identifier: GPL-2.0-only */
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#ifndef __SOC_MEDIATEK_COMMON_DPM_COMMON_H__
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#define __SOC_MEDIATEK_COMMON_DPM_COMMON_H__
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#include <soc/mcu_common.h>
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void dpm_reset(struct mtk_mcu *mcu);
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int dpm_init_mcu(struct mtk_mcu *mcu_list);
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int dpm_init(void);
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int dpm_4ch_para_setting(void);
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int dpm_4ch_init(void);
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#endif /* __SOC_MEDIATEK_COMMON_DPM_COMMON_H__ */
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@ -4,7 +4,7 @@
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#define __SOC_MEDIATEK_COMMON_DPM_V1_H__
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#include <soc/addressmap.h>
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#include <soc/mcu_common.h>
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#include <soc/dpm_common.h>
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#include <types.h>
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struct dpm_regs {
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@ -48,9 +48,4 @@ check_member(dpm_regs, status_4, 0x70B0);
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static struct dpm_regs *const mtk_dpm = (void *)DPM_CFG_BASE;
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void dpm_reset(struct mtk_mcu *mcu);
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int dpm_init(void);
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int dpm_4ch_para_setting(void);
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int dpm_4ch_init(void);
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#endif /* __SOC_MEDIATEK_COMMON_DPM_V1_H__ */
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@ -4,7 +4,7 @@
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#define __SOC_MEDIATEK_COMMON_DPM_V2_H__
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#include <soc/addressmap.h>
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#include <soc/mcu_common.h>
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#include <soc/dpm_common.h>
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#define DPM_RST_OFFSET 0x7074
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#define DPM_SW_RSTN BIT(0)
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@ -16,7 +16,4 @@
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#define ENABLE_DRAMC_WBR_MASK 0x2ffff
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void dpm_reset(struct mtk_mcu *mcu);
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int dpm_init(void);
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#endif /* __SOC_MEDIATEK_COMMON_DPM_V2_H__ */
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@ -41,6 +41,7 @@ ramstage-y += ../common/dfd.c
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ramstage-y += ../common/display.c
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ramstage-y += ../common/dp/dptx_common.c ../common/dp/dptx_hal_common.c
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ramstage-y += ../common/dp/dp_intf.c ../common/dp/dptx.c ../common/dp/dptx_hal.c dp_intf.c
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ramstage-y += ../common/dpm.c
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ramstage-y += ../common/dpm_v1.c
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ramstage-$(CONFIG_DPM_FOUR_CHANNEL) += ../common/dpm_4ch.c
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ramstage-y += ../common/dsi.c ../common/mtk_mipi_dphy.c
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@ -38,6 +38,7 @@ ramstage-$(CONFIG_ARM64_USE_ARM_TRUSTED_FIRMWARE) += ../common/bl31.c
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ramstage-y += ../common/ddp.c ddp.c
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ramstage-y += devapc.c
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ramstage-y += ../common/dfd.c
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ramstage-y += ../common/dpm.c
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ramstage-y += ../common/dpm_v1.c
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ramstage-y += ../common/dsi.c ../common/mtk_mipi_dphy.c
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ramstage-y += ../common/l2c_ops.c
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@ -48,6 +48,7 @@ ramstage-y += ../common/ddp.c ddp.c
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ramstage-y += ../common/devapc.c devapc.c
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ramstage-y += ../common/dfd.c
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ramstage-y += ../common/display.c
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ramstage-y += ../common/dpm.c
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ramstage-y += ../common/dpm_v1.c
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ramstage-$(CONFIG_DPM_FOUR_CHANNEL) += ../common/dpm_4ch.c
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ramstage-y += ../common/dp/dptx_common.c ../common/dp/dptx_hal_common.c
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@ -58,6 +58,7 @@ ramstage-$(CONFIG_ARM64_USE_ARM_TRUSTED_FIRMWARE) += ../common/bl31.c
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ramstage-y += dcc.c
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ramstage-y += ddp.c
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ramstage-y += ../common/display.c
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ramstage-y += ../common/dpm.c
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ramstage-y += ../common/dpm_v2.c
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ramstage-y += ../common/dp/dptx_common.c ../common/dp/dptx_hal_common.c
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ramstage-y += dptx.c dptx_hal.c dp_intf.c
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