PPC commit
This commit is contained in:
Ronald G. Minnich
parent
fe0b6bc0c5
commit
6510b2a77b
16 changed files with 363 additions and 286 deletions
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@ -1,3 +1,2 @@
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dir boot
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#dir boot
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dir lib
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dir smp
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@ -1,131 +1,239 @@
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/* -*- asm -*-
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* $ $
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*
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*/
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/* $Id$ */
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/* Copyright 2000 AG Electronics Ltd. */
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/* This code is distributed without warranty under the GPL v2 (see COPYING) */
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#include <arch/asm.h>
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#include <arch/intel.h>
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#define ASM
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#include "ppcreg.h"
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#include <ppc_asm.tmpl>
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#define BSP_IOREGION1 0x80000000
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#define BSP_IOMASK1 BAT_BL_256M | BAT_VALID_SUPERVISOR | BAT_VALID_USER
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#define BSP_IOREGION2 0xFD000000
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#define BSP_IOMASK2 BAT_BL_32M | BAT_VALID_SUPERVISOR | BAT_VALID_USER
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#include <pciconf.h>
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#ifdef SMP
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#include <cpu/p6/apic.h>
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#endif
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/*
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* This is the entry code the code in .reset section
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* jumps to this address.
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*
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*/
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.section ".rom.data", "a", @progbits
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.section ".rom.text", "ax", @progbits
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intel_chip_post_macro(0x01) /* delay for chipsets */
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.globl _start
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.type _start, @function
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.globl __bss_end
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.globl __start_address_check
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/*
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* Locate at hreset vector
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*/
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.space (0x100)
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_start:
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b system_reset
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/*
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* Space for exception table
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*/
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.space (0x3000)
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system_reset:
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isync
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/*
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* Disable dcache and MMU, so that init_memory stands a chance
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*/
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li r0, 0
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sync
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mtspr HID0, r0
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sync
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mtmsr r0
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isync
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/*
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* Invalidate BATS
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*/
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mtibatu 0, r0
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mtibatu 1, r0
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mtibatu 2, r0
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mtibatu 3, r0
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isync
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mtdbatu 0, r0
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mtdbatu 1, r0
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mtdbatu 2, r0
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mtdbatu 3, r0
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isync
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/*
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* Clear segment registers
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*/
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mtsr 0, r0
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isync
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mtsr 1, r0
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isync
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mtsr 2, r0
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isync
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mtsr 3, r0
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isync
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mtsr 4, r0
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isync
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mtsr 5, r0
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isync
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mtsr 6, r0
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isync
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mtsr 7, r0
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isync
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mtsr 8, r0
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isync
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mtsr 9, r0
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isync
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mtsr 10, r0
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isync
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mtsr 11, r0
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isync
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mtsr 12, r0
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isync
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mtsr 13, r0
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isync
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mtsr 14, r0
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isync
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mtsr 15, r0
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isync
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/*
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* Initialize northbridge. This has to happen early because it
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* resets memory. Memory is on at this point, albeit with
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* pessimistic settings. We reconfigure later using I2C.
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*/
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bl bsp_init_northbridge
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/*
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* CACHE_RAM_BASE - this is a 128KB BAT covering the
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* __start_data address. We allocate it in the cache so
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* that we can continue running and
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* report a memory failure in early startup code.
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*/
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/*
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* Set up DBATs
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*/
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//lis r2, CACHE_RAM_BASE@ha
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//lis r2, _RAMBASE@ha
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//ori r3, r2, BAT_BL_256M | BAT_VALID_SUPERVISOR | BAT_VALID_USER
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//ori r2, r2, BAT_READ_WRITE
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lis r2, 0@ha
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ori r3, r2, BAT_BL_256M | BAT_VALID_SUPERVISOR | BAT_VALID_USER
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ori r2, r2, BAT_READ_WRITE
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mtdbatu 0, r3
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mtdbatl 0, r2
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isync
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//lis r2, _ROMBASE@ha
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//ori r3, r2, BAT_BL_16M | BAT_VALID_SUPERVISOR | BAT_VALID_USER
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//ori r2, r2, BAT_READ_ONLY
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//mtdbatu 1, r3
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//mtdbatl 1, r2
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lis r2, 0xfc000000@ha
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ori r3, r2, BAT_BL_64M | BAT_VALID_SUPERVISOR | BAT_VALID_USER
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ori r2, r2, BAT_CACHE_INHIBITED | BAT_GUARDED | BAT_READ_WRITE
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mtdbatu 1, r3
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mtdbatl 1, r2
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isync
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lis r2, BSP_IOREGION1@h
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ori r3, r2, BSP_IOMASK1
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ori r2, r2, BAT_CACHE_INHIBITED | BAT_GUARDED | BAT_READ_WRITE
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mtdbatu 2, r3
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mtdbatl 2, r2
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isync
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//lis r2, BSP_IOREGION2@h
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//ori r3, r2, BSP_IOMASK2
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//ori r2, r2, BAT_CACHE_INHIBITED | BAT_GUARDED | BAT_READ_WRITE
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//mtdbatu 3, r3
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//mtdbatl 3, r2
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/*
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* IBATS
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*/
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lis r2, 0@ha
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ori r3, r2, BAT_BL_256M | BAT_VALID_SUPERVISOR | BAT_VALID_USER
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ori r2, r2, BAT_READ_WRITE
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mtibatu 0, r3
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mtibatl 0, r2
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isync
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lis r2, _ROMBASE@ha
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ori r3, r2, BAT_BL_16M | BAT_VALID_SUPERVISOR | BAT_VALID_USER
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ori r2, r2, BAT_READ_ONLY
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mtibatu 1, r3
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mtibatl 1, r2
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isync
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/*
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* Invalidate tlb entries
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*/
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lis r3, 0
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lis r5, 0x4
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isync
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tlblp:
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tlbie r3
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sync
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addi r3, r3, 0x1000
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cmp 0, 0, r3, r5
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blt tlblp
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sync
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/*
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* Enable MMU
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*/
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mfmsr r2
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ori r2, r2, MSR_DR | MSR_IR
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isync
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mtmsr r2
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isync
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/*
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* Relocate payload (text & data) to ram
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*/
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lis r3, _liseg@ha
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addi r3, r3, _liseg@l
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lis r4, _iseg@ha
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addi r4, r4, _iseg@l
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/*
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* Skip if they're the same
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*/
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cmp 0, 0, r3, r4
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beq skip
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lis r7, _eliseg@ha
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addi r7, r7, _eliseg@l
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relocate_loop:
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lwzx r5, 0, r3
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stwx r5, 0, r4
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addi r3, r3, 4
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addi r4, r4, 4
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cmp 0, 0, r3, r7
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ble relocate_loop
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skip:
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/*
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* Enable L1 dcache
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*/
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mfspr r2, HID0
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ori r2, r2, HID0_DCE | HID0_DCFI
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sync
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mtspr HID0, r2
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/*
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* Enable L1 icache
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*/
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mfspr r2, HID0
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ori r2, r2, HID0_ICE | HID0_ICFI
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isync
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mtspr HID0, r2
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/*
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* Start payload
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*/
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b _iseg
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#include "crt0_includes.h"
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CONSOLE_DEBUG_TX_STRING($str_after_ram)
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/* clear boot_complete flag */
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xorl %ebp, %ebp
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__main:
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/*
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* Copy data into RAM and clear the BSS. Since these segments
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* isn\'t really that big we just copy/clear using bytes, not
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* double words.
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*/
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intel_chip_post_macro(0x11) /* post 11 */
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cld /* clear direction flag */
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/* copy linuxBIOS from it's initial load location to
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* the location it is compiled to run at.
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* Normally this is copying from FLASH ROM to RAM.
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*/
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leal EXT(_liseg), %esi
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leal EXT(_iseg), %edi
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cmpl %esi, %edi
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jz .Lnocopy
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movl $EXT(_eliseg), %ecx
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subl %esi, %ecx
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jz .Lnocopy /* should not happen */
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rep
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movsb
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.Lnocopy:
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intel_chip_post_macro(0x12) /* post 12 */
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/** clear stack */
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leal EXT(_stack), %edi
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movl $EXT(_estack), %ecx
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subl %edi, %ecx
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xorl %eax, %eax
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rep
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stosb
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/** clear bss */
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leal EXT(_bss), %edi
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movl $EXT(_ebss), %ecx
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subl %edi, %ecx
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jz .Lnobss
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xorl %eax, %eax
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rep
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stosb
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.Lnobss:
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/* set new stack */
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movl $_estack, %esp
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#ifdef SMP
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/* Get the cpu id */
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movl $APIC_DEFAULT_BASE, %edi
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movl APIC_ID(%edi), %eax
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shrl $24, %eax
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/* Get the cpu index (MAX_CPUS on error) */
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movl $-4, %ebx
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1: addl $4, %ebx
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cmpl $(MAX_CPUS << 2), %ebx
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je 2
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cmpl %eax, EXT(initial_apicid)(%ebx)
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jne 1b
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2: shrl $2, %ebx
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/* Now compute the appropriate stack */
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movl %ebx, %eax
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movl $STACK_SIZE, %ebx
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mull %ebx
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subl %eax, %esp
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#endif
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/* push the boot_complete flag */
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pushl %ebp
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/* Save the stack location */
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movl %esp, %ebp
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/*
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* Now we are finished. Memory is up, data is copied and
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* bss is cleared. Now we call the main routine and
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* let it do the rest.
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*/
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intel_chip_post_macro(0xfe) /* post fe */
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CONSOLE_DEBUG_TX_STRING($str_pre_main)
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/* memory is up. Let\'s do the rest in C -- much easier. */
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intel_chip_post_macro(0xfd) /* post fe */
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/* Resort the stack location */
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movl %ebp, %esp
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/* The boot_complete flag has already been pushed */
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call EXT(hardwaremain)
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/*NOTREACHED*/
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.Lhlt:
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intel_chip_post_macro(0xee) /* post fe */
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hlt
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jmp .Lhlt
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.section ".rom.data"
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str_after_ram: .string "Copying LinuxBIOS to ram.\r\n"
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str_pre_main: .string "Jumping to LinuxBIOS.\r\n"
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.previous
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@ -2,6 +2,7 @@
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* Memory map:
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*
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* _RAMBASE
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* : text segment
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* : data segment
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* : bss segment
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* : heap
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@ -26,14 +27,14 @@
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* We use ELF as output format. So that we can
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* debug the code in some form.
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*/
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OUTPUT_FORMAT("elf32-i386", "elf32-i386", "elf32-i386")
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OUTPUT_ARCH(i386)
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OUTPUT_FORMAT("elf32-powerpc")
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ENTRY(_start)
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TARGET(binary)
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INPUT(linuxbios_payload)
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SECTIONS
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{
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. = DEFINED(_ROMBASE)? _ROMBASE : _RAMBASE;
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. = _ROMBASE;
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/* This section might be better named .setup */
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.rom . : {
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_rom = .;
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@ -44,88 +45,17 @@ SECTIONS
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}
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_lrom = LOADADDR(.rom);
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_elrom = LOADADDR(.rom) + SIZEOF(.rom);
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. = DEFINED(_ROMBASE)? _RAMBASE : . ;
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/*
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* First we place the code and read only data (typically const declared).
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* This get placed in rom.
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*/
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.text . : AT (_elrom) {
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_text = .;
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*(.text);
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*(.text.*);
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. = ALIGN(16);
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_etext = .;
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.payload . : {
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_payload = . ;
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linuxbios_payload(*)
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_epayload = . ;
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}
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_ltext = LOADADDR(.text);
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_eltext = LOADADDR(.text) + SIZEOF(.text);
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.rodata . : AT(_eltext){
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_rodata = .;
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. = ALIGN(4);
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streams = . ;
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*(.rodata.streams)
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estreams = .;
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. = ALIGN(4);
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pci_drivers = . ;
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*(.rodata.pci_drivers)
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epci_drivers = . ;
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*(.rodata)
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*(.rodata.*)
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_erodata = .;
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}
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_lrodata = LOADADDR(.rodata);
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_elrodata = LOADADDR(.rodata) + SIZEOF(.rodata);
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/*
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* After the code we place initialized data (typically initialized
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* global variables). This gets copied into ram by startup code.
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* __data_start and __data_end shows where in ram this should be placed,
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* whereas __data_loadstart and __data_loadend shows where in rom to
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* copy from.
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*/
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.data . : AT(_elrodata) {
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_data = .;
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*(.data)
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_edata = .;
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}
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_ldata = LOADADDR(.data);
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_eldata = LOADADDR(.data) + SIZEOF(.data);
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/* The initialized data segment.
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* This is all of the data that we copy from rom into the ram.
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*/
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_iseg = _text;
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_eiseg = _edata;
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_liseg = _ltext;
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_eliseg = _eldata;
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/*
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* bss does not contain data, it is just a space that should be zero
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* initialized on startup. (typically uninitialized global variables)
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* crt0.S fills between _bss and _ebss with zeroes.
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*/
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_bss = .;
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.bss . : {
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*(.bss)
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*(.sbss)
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*(COMMON)
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}
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_ebss = .;
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_end = .;
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_stack = .;
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.stack . : {
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/* Reserve a stack for each possible cpu, +1 extra */
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. = ((MAX_CPUS * STACK_SIZE) + STACK_SIZE) ;
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}
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_estack = .;
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_heap = .;
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.heap . : {
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/* Reserve 256K for the heap */
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. = HEAP_SIZE ;
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. = ALIGN(4);
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}
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_eheap = .;
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/* The ram segment
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* This is all address of the memory resident copy of linuxBIOS.
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*/
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_ram_seg = _text;
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_eram_seg = _eheap;
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_iseg = _RAMBASE;
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_eiseg = _iseg + SIZEOF(.payload);
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_liseg = _payload;
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_eliseg = _epayload;
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/DISCARD/ : {
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*(.comment)
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*(.note)
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|
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@ -1,8 +1,3 @@
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option _ROMBASE=0xf0000
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option _RAMBASE=0x4000
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option ROM_IMAGE_SIZE=65536
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option PAYLOAD_SIZE=458752
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# By default we only have one cpu
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option MAX_CPUS=1
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# Reserve 256K for the heap
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@ -10,36 +5,36 @@ option HEAP_SIZE=0x40000
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# Reserve 8K for each stack
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option STACK_SIZE=0x2000
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# By default on x86 we have a memory hole between 640K and 1MB
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option MEMORY_HOLE=1
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ldscript arch/i386/config/ldscript.base
|
||||
|
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# How do I add -mprefered-stack-boundary=2 if the compiler supports it?
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# On x86 tt results in a code size reduction.
|
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#
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ldscript arch/ppc/config/ldscript.base
|
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|
||||
dir /src/config
|
||||
|
||||
makerule all : romimage ;
|
||||
makerule floppy : all ; mcopy -o romimage a:
|
||||
makerule romimage : linuxbios.rom payload.block ; cat payload.block linuxbios.rom > romimage
|
||||
makerule all : linuxbios.sunix ;
|
||||
|
||||
makerule linuxbios.sdos: linuxbios ;
|
||||
addaction linuxbios.sdos $(OBJCOPY) linuxbios --change-addresses 0x1100000 -O srec $@
|
||||
|
||||
makerule linuxbios.sunix: linuxbios.sdos ;
|
||||
addaction linuxbios.sunix tr -d '\015' < linuxbios.sdos > linuxbios.sunix
|
||||
|
||||
#makerule all : romimage ;
|
||||
#makerule floppy : all ; mcopy -o romimage a:
|
||||
#makerule romimage : linuxbios.rom payload.block ; cat payload.block linuxbios.rom > romimage
|
||||
|
||||
#makerule linuxbios.rom: linuxbios.strip ;
|
||||
#addaction linuxbios.rom export size=`ls -l linuxbios.strip | (read p c u g size r ; echo $$size)` ; \
|
||||
#addaction linuxbios.rom echo $$size ; \
|
||||
#addaction linuxbios.rom dd if=linuxbios.strip of=linuxbios.rom bs=1 seek=`expr $(ROM_IMAGE_SIZE) - $$size`
|
||||
|
||||
|
||||
makerule linuxbios.rom: linuxbios.strip ;
|
||||
addaction linuxbios.rom export size=`ls -l linuxbios.strip | (read p c u g size r ; echo $$size)` ; \
|
||||
addaction linuxbios.rom echo $$size ; \
|
||||
addaction linuxbios.rom dd if=linuxbios.strip of=linuxbios.rom bs=1 seek=`expr $(ROM_IMAGE_SIZE) - $$size`
|
||||
#makerule payload.block : $(if $(PAYLOAD),$(PAYLOAD), linux.bin.gz) ; dd conv=sync bs=$(PAYLOAD_SIZE) if=$< of=$@
|
||||
|
||||
|
||||
makerule payload.block : $(if $(PAYLOAD),$(PAYLOAD), linux.bin.gz) ; dd conv=sync bs=$(PAYLOAD_SIZE) if=$< of=$@
|
||||
|
||||
makerule linux.bin.gz: linux.bin ;gzip -f -3 linux.bin
|
||||
makerule linux.bin: $(LINUX) ; objcopy -O binary -R .note -R .comment -S $< $@
|
||||
#makerule linux.bin.gz: linux.bin ;gzip -f -3 linux.bin
|
||||
#makerule linux.bin: $(LINUX) ; $(CROSS_COMPILE)objcopy -O binary -R .note -R .comment -S $< $@
|
||||
|
||||
|
||||
addaction clean rm -f romimage linux.* payload.*
|
||||
|
||||
# do standard config files that the user need not specify
|
||||
# for now, this is just 'lib', but it may be more later.
|
||||
dir /src/arch/i386
|
||||
dir /src/arch/ppc
|
||||
|
|
|
|||
|
|
@ -1,5 +1,5 @@
|
|||
#ifndef I386_STDDEF_H
|
||||
#define I386_STDDEF_H
|
||||
#ifndef PPC_STDDEF_H
|
||||
#define PPC_STDDEF_H
|
||||
|
||||
typedef long ptrdiff_t;
|
||||
typedef unsigned long size_t;
|
||||
|
|
@ -12,4 +12,4 @@ typedef unsigned int wint_t;
|
|||
|
||||
#define offsetof(TYPE, MEMBER) ((size_t) &((TYPE *)0)->MEMBER)
|
||||
|
||||
#endif /* I386_STDDEF_H */
|
||||
#endif /* PPC_STDDEF_H */
|
||||
|
|
|
|||
|
|
@ -1,5 +1,5 @@
|
|||
#ifndef I386_STDINT_H
|
||||
#define I386_STDINT_H
|
||||
#ifndef PPC_STDINT_H
|
||||
#define PPC_STDINT_H
|
||||
|
||||
/* Exact integral types */
|
||||
typedef unsigned char uint8_t;
|
||||
|
|
@ -49,4 +49,4 @@ typedef long long int intmax_t;
|
|||
typedef unsigned long long uintmax_t;
|
||||
|
||||
|
||||
#endif /* I386_STDINT_H */
|
||||
#endif /* PPC_STDINT_H */
|
||||
|
|
|
|||
|
|
@ -1,7 +1,7 @@
|
|||
object i386_subr.o
|
||||
object params.o
|
||||
object hardwaremain.o
|
||||
object pirq_routing.o HAVE_PIRQ_TABLE
|
||||
object vgabios.o CONFIG_VGABIOS
|
||||
object idt.o CONFIG_REALMODE_IDT
|
||||
option CONFIG_LOGICAL_CPUS=1
|
||||
object c_start.S
|
||||
object setup.o
|
||||
object id.o
|
||||
object timer.o
|
||||
object timebase.S
|
||||
object floats.S
|
||||
|
||||
|
|
|
|||
|
|
@ -45,12 +45,12 @@ expr CONFIG_UNCOMPRESSED=!CONFIG_COMPRESS
|
|||
makedefine LINUXBIOS_PAYLOAD-$(CONFIG_COMPRESS):=linuxbios_payload.nrv2b
|
||||
makedefine LINUXBIOS_PAYLOAD-$(CONFIG_UNCOMPRESSED):=linuxbios_payload.bin
|
||||
|
||||
addaction linuxbios_c nm -n linuxbios_c | sort > linuxbios_c.map
|
||||
addaction linuxbios_c $(CROSS_COMPILE)nm -n linuxbios_c | sort > linuxbios_c.map
|
||||
makerule linuxbios_payload.bin: linuxbios_c; $(OBJCOPY) -O binary $< $@
|
||||
makerule linuxbios_payload.nrv2b: linuxbios_payload.bin nrv2b ; ./nrv2b e $< $@
|
||||
makerule linuxbios_payload: $(LINUXBIOS_PAYLOAD-1) ; cp $(LINUXBIOS_PAYLOAD-1) linuxbios_payload
|
||||
makerule linuxbios: crt0.o linuxbios_payload ldscript.ld ; $(CC) -nostdlib -nostartfiles -static -o $@ -T ldscript.ld crt0.o
|
||||
addaction linuxbios nm -n linuxbios | sort > linuxbios.map
|
||||
makerule linuxbios: crt0.o linuxbios_payload ldscript.ld; $(CC) -nostdlib -nostartfiles -static -o $@ -T ldscript.ld crt0.o
|
||||
addaction linuxbios $(CROSS_COMPILE)nm -n linuxbios | sort > linuxbios.map
|
||||
|
||||
makerule linuxbios.a : $(OBJECTS-1) ; rm -f linuxbios.a
|
||||
addaction linuxbios.a ar cr linuxbios.a $(OBJECTS-1)
|
||||
|
|
|
|||
|
|
@ -274,6 +274,7 @@
|
|||
#define PCI_DEVFN(slot,func) ((((slot) & 0x1f) << 3) | ((func) & 0x07))
|
||||
#define PCI_SLOT(devfn) (((devfn) >> 3) & 0x1f)
|
||||
#define PCI_FUNC(devfn) ((devfn) & 0x07)
|
||||
#define PCI_BDF(bus,dev,func) ((bus) << 16 | (dev) << 11 | (func) << 8)
|
||||
|
||||
|
||||
#include <types.h>
|
||||
|
|
@ -344,6 +345,15 @@ struct pci_dev {
|
|||
struct pci_dev_operations *ops;
|
||||
};
|
||||
|
||||
struct pci_ops {
|
||||
int (*read_byte) (u8 bus, int devfn, int where, u8 * val);
|
||||
int (*read_word) (u8 bus, int devfn, int where, u16 * val);
|
||||
int (*read_dword) (u8 bus, int devfn, int where, u32 * val);
|
||||
int (*write_byte) (u8 bus, int devfn, int where, u8 val);
|
||||
int (*write_word) (u8 bus, int devfn, int where, u16 val);
|
||||
int (*write_dword) (u8 bus, int devfn, int where, u32 val);
|
||||
};
|
||||
|
||||
extern struct pci_dev pci_root; /* root bus */
|
||||
extern struct pci_dev *pci_devices; /* list of all devices */
|
||||
|
||||
|
|
@ -409,6 +419,7 @@ int pci_debugwrite_config_word(struct pci_dev *dev, u8 where, u16 val);
|
|||
int pci_debugwrite_config_dword(struct pci_dev *dev, u8 where, u32 val);
|
||||
void pci_set_master(struct pci_dev *dev);
|
||||
void pci_set_method(void);
|
||||
int pci_set_direct(struct pci_ops *);
|
||||
void pci_enumerate(void);
|
||||
void pci_configure(void);
|
||||
void pci_enable(void);
|
||||
|
|
|
|||
|
|
@ -98,7 +98,7 @@ static void flush_window(void)
|
|||
void gunzip_setup(void)
|
||||
{
|
||||
/* common globals -- don't rely on init! */
|
||||
printk_debug(__FUNCTION__ "\n");
|
||||
printk_debug("%s\n", __FUNCTION__ );
|
||||
outcnt = 0;
|
||||
bytes_out = 0;
|
||||
output_ptr = 0;
|
||||
|
|
|
|||
|
|
@ -35,16 +35,6 @@ unsigned long pci_memory_base = 0xc0000000;
|
|||
|
||||
static const struct pci_ops *conf;
|
||||
|
||||
struct pci_ops {
|
||||
int (*read_byte) (u8 bus, int devfn, int where, u8 * val);
|
||||
int (*read_word) (u8 bus, int devfn, int where, u16 * val);
|
||||
int (*read_dword) (u8 bus, int devfn, int where, u32 * val);
|
||||
int (*write_byte) (u8 bus, int devfn, int where, u8 val);
|
||||
int (*write_word) (u8 bus, int devfn, int where, u16 val);
|
||||
int (*write_dword) (u8 bus, int devfn, int where, u32 val);
|
||||
};
|
||||
|
||||
|
||||
/*
|
||||
* Direct access to PCI hardware...
|
||||
*/
|
||||
|
|
@ -199,12 +189,13 @@ static int pci_sanity_check(const struct pci_ops *o)
|
|||
#define PCI_CLASS_DISPLAY_VGA 0x0300
|
||||
#define PCI_VENDOR_ID_COMPAQ 0x0e11
|
||||
#define PCI_VENDOR_ID_INTEL 0x8086
|
||||
#define PCI_VENDOR_ID_MOTOROLA 0x1057
|
||||
|
||||
for (bus = 0, devfn = 0; devfn < 0x100; devfn++)
|
||||
if ((!o->read_word(bus, devfn, PCI_CLASS_DEVICE, &x) &&
|
||||
(x == PCI_CLASS_BRIDGE_HOST || x == PCI_CLASS_DISPLAY_VGA)) ||
|
||||
(!o->read_word(bus, devfn, PCI_VENDOR_ID, &x) &&
|
||||
(x == PCI_VENDOR_ID_INTEL || x == PCI_VENDOR_ID_COMPAQ)))
|
||||
(x == PCI_VENDOR_ID_INTEL || x == PCI_VENDOR_ID_COMPAQ || x == PCI_VENDOR_ID_MOTOROLA)))
|
||||
return 1;
|
||||
printk_err("PCI: Sanity check failed\n");
|
||||
return 0;
|
||||
|
|
@ -385,6 +376,12 @@ void pci_set_method()
|
|||
conf = pci_check_direct();
|
||||
}
|
||||
|
||||
int pci_set_direct(struct pci_ops *method)
|
||||
{
|
||||
conf = method;
|
||||
return pci_sanity_check(method);
|
||||
}
|
||||
|
||||
/* allocating resources on PCI is a mess. The reason is that
|
||||
* the BAR size is actually two things: one is the size, and
|
||||
* the other is the alignment of the data. Take, for example, the
|
||||
|
|
@ -892,13 +889,11 @@ handle_superio(int pass, struct superio *all_superio[], int nsuperio)
|
|||
|
||||
for (i = 0; i < nsuperio; i++){
|
||||
s = all_superio[i];
|
||||
printk_debug(__FUNCTION__
|
||||
" Pass %d, check #%d, s %p s->super %p\n",
|
||||
pass, i, s, s->super);
|
||||
printk_debug("%s: Pass %d, check #%d, s %p s->super %p\n",
|
||||
__FUNCTION__, pass, i, s, s->super);
|
||||
if (!s->super) {
|
||||
printk_debug(__FUNCTION__
|
||||
" Pass %d, Skipping #%d as it has no superio pointer!\n",
|
||||
pass, i);
|
||||
printk_debug("%s: Pass %d, Skipping #%d as it has no superio pointer!\n",
|
||||
__FUNCTION__, pass, i);
|
||||
continue;
|
||||
}
|
||||
|
||||
|
|
@ -906,12 +901,12 @@ handle_superio(int pass, struct superio *all_superio[], int nsuperio)
|
|||
pass, s->super->name);
|
||||
|
||||
// if no port is assigned use the defaultport
|
||||
printk_info(__FUNCTION__ " port 0x%x, defaultport 0x%x\n",
|
||||
s->port, s->super->defaultport);
|
||||
printk_info("%s: port 0x%x, defaultport 0x%x\n",
|
||||
__FUNCTION__, s->port, s->super->defaultport);
|
||||
if (!s->port)
|
||||
s->port = s->super->defaultport;
|
||||
|
||||
printk_info(__FUNCTION__ " Using port 0x%x\n", s->port);
|
||||
printk_info("%s: Using port 0x%x\n", __FUNCTION__, s->port);
|
||||
|
||||
// need to have both pre_pci_init and devfn defined.
|
||||
if (s->super->pre_pci_init && (pass == 0)) {
|
||||
|
|
@ -924,7 +919,7 @@ handle_superio(int pass, struct superio *all_superio[], int nsuperio)
|
|||
printk_debug(" Call finishup\n");
|
||||
s->super->finishup(s);
|
||||
}
|
||||
printk_debug(__FUNCTION__ " Pass %d, done #%d\n", pass, i);
|
||||
printk_debug("%s: Pass %d, done #%d\n", __FUNCTION__, pass, i);
|
||||
}
|
||||
printk_debug("handle_superio done\n");
|
||||
}
|
||||
|
|
|
|||
|
|
@ -144,6 +144,33 @@ static inline unsigned long uart_rx_bytes(unsigned base_port,
|
|||
|
||||
inline void uart_init(unsigned base_port, unsigned divisor)
|
||||
{
|
||||
/*
|
||||
* enable divisor access
|
||||
*/
|
||||
outb(0x80 | UART_LCS, base_port + UART_LCR);
|
||||
|
||||
/*
|
||||
* set divisior
|
||||
*/
|
||||
outb((divisor >> 8) & 0xFF, base_port + UART_DLM);
|
||||
outb(divisor & 0xFF, base_port + UART_DLL);
|
||||
|
||||
/*
|
||||
* disable divisor access
|
||||
*/
|
||||
outb(UART_LCS, base_port + UART_LCR);
|
||||
|
||||
/*
|
||||
* set polled mode
|
||||
*/
|
||||
outb(0x0, base_port + UART_IER);
|
||||
|
||||
/*
|
||||
* enable and clear FIFOs
|
||||
*/
|
||||
outb(0x07, base_port + UART_FCR);
|
||||
outb(0x03, base_port + UART_MCR);
|
||||
#if 0
|
||||
/* disable interrupts */
|
||||
outb(0x0, base_port + UART_IER);
|
||||
/* enable fifo's */
|
||||
|
|
@ -153,6 +180,7 @@ inline void uart_init(unsigned base_port, unsigned divisor)
|
|||
outb(divisor & 0xFF, base_port + UART_DLL);
|
||||
outb((divisor >> 8) & 0xFF, base_port + UART_DLM);
|
||||
outb(UART_LCS, base_port + UART_LCR);
|
||||
#endif
|
||||
}
|
||||
|
||||
void ttys0_init(void)
|
||||
|
|
|
|||
|
|
@ -91,7 +91,8 @@ void post_code(uint8_t value)
|
|||
{
|
||||
#ifdef SERIAL_POST
|
||||
printk_info("POST: 0x%02x\n", value);
|
||||
#endif
|
||||
#elsif !define(NO_POST)
|
||||
outb(value, 0x80);
|
||||
#endif
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -1,9 +1,9 @@
|
|||
object keyboard.o
|
||||
object mc146818rtc.o
|
||||
object mc146818rtc.o CONFIG_MC146818RTC
|
||||
object isa-dma.o
|
||||
object i8259.o
|
||||
object i8259.o CONFIG_I8259
|
||||
object udelay_timer2.o CONFIG_UDELAY_TIMER2
|
||||
object beep.o
|
||||
object beep.o CONFIG_BEEP
|
||||
object vga_load_regs.o VIDEO_CONSOLE
|
||||
object font_8x16.o VIDEO_CONSOLE
|
||||
object vga_set_mode.o VIDEO_CONSOLE
|
||||
|
|
|
|||
|
|
@ -167,7 +167,8 @@ static int init_drive(unsigned base, int driveno)
|
|||
|
||||
printk_info("%s \n", harddisk_info[driveno].model_number);
|
||||
|
||||
printk_info(__FUNCTION__ " sectors_per_track=[%d], num_heads=[%d], num_cylinders=[%d]\n",
|
||||
printk_info("%s: sectors_per_track=[%d], num_heads=[%d], num_cylinders=[%d]\n",
|
||||
__FUNCTION__,
|
||||
harddisk_info[driveno].num_sectors_per_track,
|
||||
harddisk_info[driveno].num_heads,
|
||||
harddisk_info[driveno].num_cylinders);
|
||||
|
|
@ -332,9 +333,9 @@ int ide_read_sector(int drive, void * buffer, unsigned int block, int byte_offse
|
|||
int address_mode = harddisk_info[drive].address_mode;
|
||||
//int i;
|
||||
|
||||
printk_info(__FUNCTION__ " drive[%d], buffer[%08x], block[%08x], offset[%d], n_bytes[%d]\n",
|
||||
drive, buffer, block, byte_offset, n_bytes);
|
||||
printk_info(__FUNCTION__ " block(%08x) to addr(%08x)\r", block, (int)buffer);
|
||||
printk_info("%s: drive[%d], buffer[%08x], block[%08x], offset[%d], n_bytes[%d]\n",
|
||||
__FUNCTION__, drive, buffer, block, byte_offset, n_bytes);
|
||||
printk_info("%s: block(%08x) to addr(%08x)\r", __FUNCTION__, block, (int)buffer);
|
||||
if ((drive < 0) || (drive >= NUM_HD) ||
|
||||
(harddisk_info[drive].drive_exists == 0))
|
||||
{
|
||||
|
|
@ -360,7 +361,7 @@ int ide_read_sector(int drive, void * buffer, unsigned int block, int byte_offse
|
|||
IDE_DH_HEAD(track % harddisk_info[drive].num_heads) |
|
||||
IDE_DH_DRIVE(drive) |
|
||||
IDE_DH_CHS;
|
||||
printk_info(__FUNCTION__ " CHS: track=[%d], sector_number=[%d], cylinder=[%d]\n", track, cmd.sector_number, cmd.cylinder);
|
||||
printk_info("%s: CHS: track=[%d], sector_number=[%d], cylinder=[%d]\n", __FUNCTION__, track, cmd.sector_number, cmd.cylinder);
|
||||
/*
|
||||
*/
|
||||
} else {
|
||||
|
|
@ -379,8 +380,8 @@ int ide_read_sector(int drive, void * buffer, unsigned int block, int byte_offse
|
|||
IDE_DH_DRIVE(drive) |
|
||||
IDE_DH_LBA;
|
||||
#endif
|
||||
printk_info(__FUNCTION__ " LBA: drivehead[%0x], cylinder[%04x], sector[%0x], block[%8x]\n",
|
||||
cmd.drivehead, cmd.cylinder, cmd.sector_number, block & 0x0fffffff);
|
||||
printk_info("%s: LBA: drivehead[%0x], cylinder[%04x], sector[%0x], block[%8x]\n",
|
||||
__FUNCTION__, cmd.drivehead, cmd.cylinder, cmd.sector_number, block & 0x0fffffff);
|
||||
/*
|
||||
*/
|
||||
}
|
||||
|
|
@ -411,9 +412,9 @@ int ide_write_sector(int drive, void * buffer, unsigned int block ) {
|
|||
int address_mode = harddisk_info[drive].address_mode;
|
||||
//int i;
|
||||
|
||||
printk_info(__FUNCTION__ " drive[%d], buffer[%08x], block[%08x]\n",
|
||||
drive, buffer, block);
|
||||
printk_info(__FUNCTION__ " block(%08x) from addr(%08x)\r", block, (int)buffer);
|
||||
printk_info("%s: drive[%d], buffer[%08x], block[%08x]\n",
|
||||
__FUNCTION__, drive, buffer, block);
|
||||
printk_info("%s: block(%08x) from addr(%08x)\r", __FUNCTION__, block, (int)buffer);
|
||||
if ((drive < 0) || (drive >= NUM_HD) ||
|
||||
(harddisk_info[drive].drive_exists == 0))
|
||||
{
|
||||
|
|
@ -439,7 +440,7 @@ int ide_write_sector(int drive, void * buffer, unsigned int block ) {
|
|||
IDE_DH_HEAD(track % harddisk_info[drive].num_heads) |
|
||||
IDE_DH_DRIVE(drive) |
|
||||
IDE_DH_CHS;
|
||||
printk_info(__FUNCTION__ " CHS: track=[%d], sector_number=[%d], cylinder=[%d]\n", track, cmd.sector_number, cmd.cylinder);
|
||||
printk_info("%s: CHS: track=[%d], sector_number=[%d], cylinder=[%d]\n", __FUNCTION__, track, cmd.sector_number, cmd.cylinder);
|
||||
/*
|
||||
*/
|
||||
} else {
|
||||
|
|
@ -458,8 +459,8 @@ int ide_write_sector(int drive, void * buffer, unsigned int block ) {
|
|||
IDE_DH_DRIVE(drive) |
|
||||
IDE_DH_LBA;
|
||||
#endif
|
||||
printk_info(__FUNCTION__ " LBA: drivehead[%0x], cylinder[%04x], sector[%0x], block[%8x]\n",
|
||||
cmd.drivehead, cmd.cylinder, cmd.sector_number, block & 0x0fffffff);
|
||||
printk_info("%s: LBA: drivehead[%0x], cylinder[%04x], sector[%0x], block[%8x]\n",
|
||||
__FUNCTION__, cmd.drivehead, cmd.cylinder, cmd.sector_number, block & 0x0fffffff);
|
||||
/*
|
||||
*/
|
||||
}
|
||||
|
|
@ -510,8 +511,8 @@ int ide_read_sector(int drive, void * buffer, unsigned int block, int byte_offse
|
|||
IDE_DH_DRIVE(drive) |
|
||||
IDE_DH_CHS;
|
||||
|
||||
printk_info(__FUNCTION__ " track=[%d], sector_number=[%d], cylinder=[%d]\n",
|
||||
track, cmd.sector_number, cmd.cylinder);
|
||||
printk_info("%s: track=[%d], sector_number=[%d], cylinder=[%d]\n",
|
||||
__FUNCTION__, track, cmd.sector_number, cmd.cylinder);
|
||||
write_command(base, IDE_CMD_READ_MULTI_RETRY, &cmd);
|
||||
if ((inb_p(IDE_REG_STATUS(base)) & 1) != 0) {
|
||||
return 1;
|
||||
|
|
@ -524,7 +525,7 @@ int ide_read_sector(int drive, void * buffer, unsigned int block, int byte_offse
|
|||
} else {
|
||||
status = ide_read_data(base, buffer, IDE_SECTOR_SIZE);
|
||||
}
|
||||
printk_info(__FUNCTION__ " status = [%d]\n", status);
|
||||
printk_info("%s: status = [%d]\n", __FUNCTION__, status);
|
||||
return status;
|
||||
}
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -325,6 +325,14 @@ def keyboard(dir, keyboard_name):
|
|||
def cpu(dir, cpu_name):
|
||||
common_command_action(dir, 'cpu', cpu_name)
|
||||
|
||||
# COMMAND: pmc <vendor>/<pmc card name>
|
||||
#
|
||||
# This command may only be used once. Executes the
|
||||
# config file $(TOP)/src/pmc/<vendor>/<pmc card name>/Config
|
||||
#
|
||||
def pmc(dir, pmc_name):
|
||||
common_command_action(dir, 'pmc', pmc_name)
|
||||
|
||||
# COMMAND: northsouthbridge <vendor>/<northsouthbridge name>
|
||||
#
|
||||
# This command may only be used once. Executes the config file
|
||||
|
|
@ -824,6 +832,7 @@ command_actions = {
|
|||
'target' : target,
|
||||
'mainboard' : mainboard,
|
||||
'cpu' : cpu,
|
||||
'pmc' : pmc,
|
||||
'northbridge' : northbridge,
|
||||
'southbridge' : southbridge,
|
||||
'northsouthbridge' : northsouthbridge,
|
||||
|
|
@ -1048,7 +1057,7 @@ CPUFLAGS := $(foreach _var_,$(VARIABLES),$(call D_item,$(_var_)))
|
|||
# print out all the object dependencies
|
||||
file.write("\n# object dependencies (objectrules:)\n")
|
||||
# There is ALWAYS a crt0.o
|
||||
file.write("OBJECTS-1 := crt0.o\n")
|
||||
#file.write("OBJECTS-1 := crt0.o\n")
|
||||
file.write("DRIVERS-1 :=\n")
|
||||
for objrule in objectrules:
|
||||
obj_name = objrule[0]
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue