security/tpm: Move tpm TSS and TSPI layer to security section
* Move code from src/lib and src/include into src/security/tpm * Split TPM TSS 1.2 and 2.0 * Fix header includes * Add a new directory structure with kconfig and makefile includes Change-Id: Id15a9aa6bd367560318dfcfd450bf5626ea0ec2b Signed-off-by: Philipp Deppenwiese <zaolin@das-labor.org> Reviewed-on: https://review.coreboot.org/22103 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
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51 changed files with 126 additions and 107 deletions
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@ -39,7 +39,7 @@
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#include <device/i2c_simple.h>
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#include <endian.h>
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#include <timer.h>
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#include <tpm.h>
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#include <security/tpm/tpm.h>
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#include "tpm.h"
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#define CR50_MAX_BUFSIZE 63
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@ -22,7 +22,7 @@
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#include <device/i2c_simple.h>
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#include <endian.h>
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#include <lib.h>
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#include <tpm.h>
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#include <security/tpm/tpm.h>
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#include "tpm.h"
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#include <timer.h>
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@ -23,7 +23,7 @@
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#include <device/i2c_simple.h>
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#include <endian.h>
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#include <lib.h>
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#include <tpm.h>
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#include <security/tpm/tpm.h>
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#include <timer.h>
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#define RECV_TIMEOUT (1 * 1000) /* 1 second */
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@ -38,7 +38,7 @@
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#include <device/i2c_simple.h>
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#include <endian.h>
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#include <timer.h>
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#include <tpm.h>
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#include <security/tpm/tpm.h>
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#include "tpm.h"
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/* max. number of iterations after I2C NAK */
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@ -36,7 +36,7 @@
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#include <stage_cache.h>
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#include <string.h>
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#include <timestamp.h>
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#include <tpm.h>
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#include <security/tpm/tpm.h>
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#include <vendorcode/google/chromeos/chromeos.h>
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asmlinkage void *romstage_main(FSP_INFO_HEADER *fih)
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@ -12,7 +12,7 @@
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*/
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#include <compiler.h>
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#include <antirollback.h>
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#include <security/tpm/antirollback.h>
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#include <arch/io.h>
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#include <arch/cpu.h>
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#include <arch/symbols.h>
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@ -31,7 +31,7 @@
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#include <string.h>
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#include <symbols.h>
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#include <timestamp.h>
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#include <tpm_lite/tlcl.h>
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#include <security/tpm/tlcl.h>
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#include <security/vboot/vboot_common.h>
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#include <vb2_api.h>
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@ -1,9 +1,3 @@
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config MAINBOARD_HAS_LPC_TPM
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bool
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default n
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help
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Board has TPM support
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config LPC_TPM
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bool "Enable TPM support"
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depends on MAINBOARD_HAS_LPC_TPM
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@ -17,7 +17,7 @@
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#include <console/cbmem_console.h>
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#include <console/console.h>
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#include <arch/acpi.h>
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#include <tpm.h>
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#include <security/tpm/tpm.h>
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#include <reset.h>
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//#define EXTRA_LOGGING
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@ -32,7 +32,7 @@
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#include <arch/acpi_device.h>
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#include <device/device.h>
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#include <console/console.h>
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#include <tpm.h>
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#include <security/tpm/tpm.h>
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#include <arch/early_variables.h>
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#include <device/pnp.h>
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#include "chip.h"
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@ -7,7 +7,7 @@
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#include <arch/early_variables.h>
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#include <console/console.h>
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#include <string.h>
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#include <tpm.h>
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#include <security/tpm/tpm.h>
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#include "tpm.h"
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@ -23,7 +23,7 @@
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#include <endian.h>
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#include <string.h>
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#include <timer.h>
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#include <tpm.h>
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#include <security/tpm/tpm.h>
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#include "tpm.h"
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