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mb/starlabs/byte_adl: Correct MODEM_CLKREQ configuration

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This GPIO is used as MODEM_CLKREQ, which is Native Function 1.
Adjust the configuration accordingly.

Change-Id: If9db29df2a0da71885556a75abcb1da1508a9308
Signed-off-by: Sean Rhodes <sean@starlabs.systems>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/86136
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
This commit is contained in:
Sean Rhodes 2025-01-23 20:59:02 +00:00
commit 64b8f2130c
1 changed files with 2 additions and 2 deletions
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4
src/mainboard/starlabs/byte_adl/variants/mk_ii/gpio.c
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@ -298,8 +298,8 @@ const struct pad_config gpio_table[] = {
PAD_CFG_NF(GPP_F3, UP_20K, DEEP, NF1),
/* F4: CNV RF Reset */
PAD_CFG_NF(GPP_F4, NONE, DEEP, NF1),
/* F5: Not used MODEM_CLKREQ */
PAD_CFG_NF(GPP_F5, NONE, DEEP, NF2),
/* F5: MODEM_CLKREQ */
PAD_CFG_NF(GPP_F5, NONE, DEEP, NF1),
/* F6: CNV PA Blanking */
PAD_NC(GPP_F6, NONE),
/* F7: TBT LSX VCCIO Weak Internal PD 20K