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mb/starlabs/starbook: Use SoC common CFR forms

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Use SoC common CFR forms; select CSE_DEFAULT_OPTION_STATE_DISABLED
to keep existing behavior.

Change-Id: Iaf7d826ec17b7d0c4f17f6314f00537c5ca87d46
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/87985
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Sean Rhodes <sean@starlabs.systems>
This commit is contained in:
Matt DeVillier 2025-05-09 12:44:43 -05:00 • committed by Sean Rhodes
commit 644fd7b7f5
3 changed files with 6 additions and 72 deletions
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1
src/mainboard/starlabs/starbook/Kconfig
View file

@ -2,6 +2,7 @@
config BOARD_STARLABS_STARBOOK_SERIES
def_bool n
select CSE_DEFAULT_CFR_OPTION_STATE_DISABLED
select DRIVERS_EFI_VARIABLE_STORE
select DRIVERS_OPTION_CFR_ENABLED
select DRIVERS_I2C_HID

10
src/mainboard/starlabs/starbook/cfr.c
View file

@ -1,13 +1,10 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <boot/coreboot_tables.h>
#include <commonlib/coreboot_tables.h>
#include <console/cfr.h>
#include <drivers/option/cfr_frontend.h>
#include <ec/starlabs/merlin/cfr.h>
#include <inttypes.h>
#include <string.h>
#include <types.h>
#include <intelblocks/cfr.h>
#include "cfr.h"
static struct sm_obj_form performance = {
@ -40,7 +37,7 @@ static struct sm_obj_form power = {
#if CONFIG(EC_STARLABS_CHARGING_SPEED)
&charging_speed,
#endif
&power_on_after_fail,
&power_on_after_fail_bool,
NULL
},
};
@ -92,6 +89,9 @@ static struct sm_obj_form pci = {
#if CONFIG(SOC_INTEL_COMMON_BLOCK_ASPM)
&pciexp_clk_pm,
&pciexp_aspm,
#if CONFIG(HAS_INTEL_CPU_ROOT_PORTS)
&pciexp_aspm_cpu,
#endif
&pciexp_l1ss,
#endif
NULL

67
src/mainboard/starlabs/starbook/cfr.h
View file

@ -5,7 +5,6 @@
#define _STARBOOK_CFR_H_
#include <drivers/option/cfr_frontend.h>
#include <intelblocks/pcie_rp.h>
#include <variants.h>
static const struct sm_object card_reader = SM_DECLARE_BOOL({
@ -36,31 +35,6 @@ static const struct sm_object hyper_threading = SM_DECLARE_BOOL({
.default_value = true,
});
static const struct sm_object me_state = SM_DECLARE_ENUM({
.opt_name = "me_state",
.ui_name = "Intel Management Engine",
.ui_helptext = "Enable or disable the Intel Management Engine",
.default_value = 1,
.values = (const struct sm_enum_value[]) {
{ "Disabled", 1 },
{ "Enabled", 0 },
SM_ENUM_VALUE_END },
});
static const struct sm_object me_state_counter = SM_DECLARE_NUMBER({
.opt_name = "me_state_counter",
.ui_name = "ME State Counter",
.flags = CFR_OPTFLAG_SUPPRESS,
.default_value = 0,
});
static const struct sm_object power_on_after_fail = SM_DECLARE_BOOL({
.opt_name = "power_on_after_fail",
.ui_name = "Power on after failure",
.ui_helptext = "Automatically turn on after a power failure",
.default_value = false,
});
static const struct sm_object power_profile = SM_DECLARE_ENUM({
.opt_name = "power_profile",
.ui_name = "Power Profile",
@ -88,46 +62,6 @@ static const struct sm_object pci_hot_plug = SM_DECLARE_BOOL({
.default_value = false,
});
static const struct sm_object pciexp_aspm = SM_DECLARE_ENUM({
.opt_name = "pciexp_aspm",
.ui_name = "PCI ASPM",
.ui_helptext = "Controls the Active State Power Management for PCI devices."
" Enabling this feature can reduce power consumption of"
" PCI-connected devices during idle times.",
.default_value = ASPM_L0S_L1,
.values = (const struct sm_enum_value[]) {
{ "Disabled", ASPM_DISABLE },
{ "L0s", ASPM_L0S },
{ "L1", ASPM_L1 },
{ "L0sL1", ASPM_L0S_L1 },
SM_ENUM_VALUE_END },
});
static const struct sm_object pciexp_clk_pm = SM_DECLARE_BOOL({
.opt_name = "pciexp_clk_pm",
.ui_name = "PCI Clock Power Management",
.ui_helptext = "Enables or disables power management for the PCI clock. When"
" enabled, it reduces power consumption during idle states."
" This can help lower overall energy use but may impact"
" performance in power-sensitive tasks.",
.default_value = true,
});
static const struct sm_object pciexp_l1ss = SM_DECLARE_ENUM({
.opt_name = "pciexp_l1ss",
.ui_name = "PCI L1 Substates",
.ui_helptext = "Controls deeper power-saving states for PCI devices."
" Enabling this feature allows supported devices to achieve"
" lower power states at the cost of slightly increased"
" latency when exiting these states.",
.default_value = L1_SS_L1_2,
.values = (const struct sm_enum_value[]) {
{ "Disabled", L1_SS_DISABLED },
{ "L1.1", L1_SS_L1_1 },
{ "L1.2", L1_SS_L1_2 },
SM_ENUM_VALUE_END },
});
static const struct sm_object thunderbolt = SM_DECLARE_BOOL({
.opt_name = "thunderbolt",
.ui_name = "Thunderbolt",
@ -135,7 +69,6 @@ static const struct sm_object thunderbolt = SM_DECLARE_BOOL({
.default_value = true,
});
static const struct sm_object vpu = SM_DECLARE_BOOL({
.opt_name = "vpu",
.ui_name = "VPU",