From 63ec633ccddd7f1600d19df274a4ef91c9be864b Mon Sep 17 00:00:00 2001 From: Appukuttan V K Date: Tue, 6 Jan 2026 22:02:23 +0530 Subject: [PATCH] mb/google/ocelot: Update sagv_freq_mhz as per platform POR config Update the SaGV frequency registers in the devicetree as per platform Plan of Record (POR) configuration: - sagv_freq_mhz[1]: 3200 MHz -> 4800 MHz - sagv_freq_mhz[2]: 6000 MHz -> 6400 MHz - sagv_freq_mhz[3]: 6400 MHz -> 7467 MHz The current frequency points were configured lower than the platform's expected specifications. BUG=None TEST=Boot ocelot and verify that the system boots and MRC training is successful for each SAGV point. [SPEW ] Requested/actual ratio 72/72, Frequency=2400, GearMode=1, RefClk=33MHz, tCK=3333333fs [SPEW ] Requested/actual ratio 144/144, Frequency=4800, GearMode=1, RefClk=33MHz, tCK=1666667fs [SPEW ] Requested/actual ratio 192/192, Frequency=6400, GearMode=1, RefClk=33MHz, tCK=1250000fs [SPEW ] Requested/actual ratio 224/224, Frequency=7467, GearMode=1, RefClk=33MHz, tCK=1071429fs Change-Id: I7beab13bd9188aa47a45bc4a265aba75f00eded8 Signed-off-by: Appukuttan V K Reviewed-on: https://review.coreboot.org/c/coreboot/+/90688 Reviewed-by: Avi Uday Reviewed-by: P, Usha Tested-by: build bot (Jenkins) Reviewed-by: Pranava Y N --- .../google/ocelot/variants/baseboard/ocelot/devicetree.cb | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/src/mainboard/google/ocelot/variants/baseboard/ocelot/devicetree.cb b/src/mainboard/google/ocelot/variants/baseboard/ocelot/devicetree.cb index e2ea33173b..9391ac9d37 100644 --- a/src/mainboard/google/ocelot/variants/baseboard/ocelot/devicetree.cb +++ b/src/mainboard/google/ocelot/variants/baseboard/ocelot/devicetree.cb @@ -35,13 +35,13 @@ chip soc/intel/pantherlake register "sagv_freq_mhz[0]" = "2400" register "sagv_gear[0]" = "GEAR_4" - register "sagv_freq_mhz[1]" = "3200" + register "sagv_freq_mhz[1]" = "4800" register "sagv_gear[1]" = "GEAR_4" - register "sagv_freq_mhz[2]" = "6000" + register "sagv_freq_mhz[2]" = "6400" register "sagv_gear[2]" = "GEAR_4" - register "sagv_freq_mhz[3]" = "6400" + register "sagv_freq_mhz[3]" = "7467" register "sagv_gear[3]" = "GEAR_4" # Enable s0ix