diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index 78079fb8e2..16eef62c54 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -171,39 +171,6 @@ config CARSIZE
 	help
 	  This option sets the size of the area used for CAR.
 
-# variables related to AMD Hypertransport. 
-config HT_CHAIN_UNITID_BASE
-	hex
-	default 0 if CPU_AMD_K8
-	help
-		Hypertransport unit ID base value. 
-		Mainboard-dependent. 
-
-config HT_CHAIN_END_UNITID_BASE
-	hex
-	default 0x20 if CPU_AMD_K8
-	help
-		Unit id of the end of hypertransport chain 
-		(usually the real SB); if it is 
-		less than than HT_CHAIN_UNITID_BASE, 
-		it can be 0
-
-config SB_HT_CHAIN_UNITID_OFFSET_ONLY
-	hex
-        default 1 if CPU_AMD_K8
-        help
-		Determines (I don't understand; ask YHLU) 
-		if only offset SB hypertransport chain
-
-config SB_HT_CHAIN_ON_BUS0
-	hex
-        default 0 if CPU_AMD_K8
-        help
-		Make SB hypertransport chain sit on bus 0, if it is 1, 
-		will put sb ht chain on bus 0, if it is 2 will 
-		put other chain on 0x40, 0x80, 0xc0
-
-
 config K8_HT_FREQ_1G_SUPPORT
 	hex
 	default 1 if CPU_AMD_K8
diff --git a/arch/x86/amd/k8/stage1.c b/arch/x86/amd/k8/stage1.c
index d44cdf4a1e..7f233ea8b2 100644
--- a/arch/x86/amd/k8/stage1.c
+++ b/arch/x86/amd/k8/stage1.c
@@ -18,6 +18,7 @@
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
  */
 
+#include <mainboard.h>
 #include <types.h>
 #include <lib.h>
 #include <console.h>
diff --git a/device/hypertransport.c b/device/hypertransport.c
index 0ec09a2cef..2b64578c62 100644
--- a/device/hypertransport.c
+++ b/device/hypertransport.c
@@ -23,6 +23,7 @@
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
  */
 
+#include <mainboard.h>
 #include <console.h>
 #include <lib.h>
 #include <string.h>
@@ -39,7 +40,6 @@
 #include <mc146818rtc.h>
 #include <lib.h>
 #include  <lapic.h>
-#include <mainboard.h>
 
 #define OPT_HT_LINK 0
 
@@ -327,7 +327,7 @@ static void ht_collapse_early_enumeration(struct bus *bus,
 	} while ((ctrl & (1 << 5)) == 0);
 
 	/* Actually, only for one HT device HT chain, and unitid is 0. */
-#if CONFIG_HT_CHAIN_UNITID_BASE == 0
+#if HT_CHAIN_UNITID_BASE == 0
 	if (offset_unitid) {
 		return;
 	}
@@ -337,8 +337,8 @@ static void ht_collapse_early_enumeration(struct bus *bus,
 	if ((!offset_unitid)
 	    || (offset_unitid
 		&&
-		(!((CONFIG_HT_CHAIN_END_UNITID_BASE == 0)
-		   && (CONFIG_HT_CHAIN_END_UNITID_BASE < CONFIG_HT_CHAIN_UNITID_BASE))))) {
+		(!((HT_CHAIN_END_UNITID_BASE == 0)
+		   && (HT_CHAIN_END_UNITID_BASE < HT_CHAIN_UNITID_BASE))))) {
 		struct device dummy;
 		u32 id;
 		dummy.bus = bus;
@@ -390,24 +390,24 @@ unsigned int hypertransport_scan_chain(struct bus *bus, unsigned int min_devfn,
 				       unsigned int *ht_unitid_base,
 				       unsigned int offset_unitid)
 {
-	/* Even CONFIG_HT_CHAIN_UNITID_BASE == 0, we still can go through this
+	/* Even HT_CHAIN_UNITID_BASE == 0, we still can go through this
 	 * function, because of end_of_chain check, also we need it to
 	 * optimize link.
 	 */
 	unsigned int next_unitid, last_unitid;
 	struct device *old_devices, *dev, *func;
-	unsigned int min_unitid = (offset_unitid) ? CONFIG_HT_CHAIN_UNITID_BASE : 1;
+	unsigned int min_unitid = (offset_unitid) ? HT_CHAIN_UNITID_BASE : 1;
 	struct ht_link prev;
 	struct device *last_func = 0;
 	int ht_dev_num = 0;
 
-#if CONFIG_HT_CHAIN_END_UNITID_BASE < CONFIG_HT_CHAIN_UNITID_BASE
+#if HT_CHAIN_END_UNITID_BASE < HT_CHAIN_UNITID_BASE
 	/* Let's record the device of last HT device, so we can set the
-	 * unitid to CONFIG_HT_CHAIN_END_UNITID_BASE.
+	 * unitid to HT_CHAIN_END_UNITID_BASE.
 	 */
-	unsigned int real_last_unitid;
-	u8 real_last_pos;
-	struct device *real_last_dev;
+	unsigned int real_last_unitid = 0;
+	u8 real_last_pos = 0;
+	struct device *real_last_dev = NULL;
 #endif
 
 	/* Restore the hypertransport chain to its unitialized state. */
@@ -515,7 +515,7 @@ unsigned int hypertransport_scan_chain(struct bus *bus, unsigned int min_devfn,
 		/* Update the unitid of the next device. */
 		ht_unitid_base[ht_dev_num] = next_unitid;
 		ht_dev_num++;
-#if CONFIG_HT_CHAIN_END_UNITID_BASE < CONFIG_HT_CHAIN_UNITID_BASE
+#if HT_CHAIN_END_UNITID_BASE < HT_CHAIN_UNITID_BASE
 		if (offset_unitid) {
 			real_last_unitid = next_unitid;
 			real_last_pos = pos;
@@ -544,27 +544,26 @@ unsigned int hypertransport_scan_chain(struct bus *bus, unsigned int min_devfn,
 	}
 #endif
 
-#if CONFIG_HT_CHAIN_END_UNITID_BASE < CONFIG_HT_CHAIN_UNITID_BASE
+#if HT_CHAIN_END_UNITID_BASE < HT_CHAIN_UNITID_BASE
 	if (offset_unitid && (ht_dev_num > 0)) {
 		u16 flags;
-		int i;
 		struct device *last_func = 0;
 		flags = pci_read_config16(real_last_dev,
 			      real_last_pos + PCI_CAP_FLAGS);
 		flags &= ~0x1f;
-		flags |= CONFIG_HT_CHAIN_END_UNITID_BASE & 0x1f;
+		flags |= HT_CHAIN_END_UNITID_BASE & 0x1f;
 		pci_write_config16(real_last_dev, real_last_pos + PCI_CAP_FLAGS,
 				   flags);
 
 		for (func = real_last_dev; func; func = func->sibling) {
 			func->path.pci.devfn -=
 			    ((real_last_unitid -
-			      CONFIG_HT_CHAIN_END_UNITID_BASE) << 3);
+			      HT_CHAIN_END_UNITID_BASE) << 3);
 			last_func = func;
 		}
 
 		/* Update last one. */
-		ht_unitid_base[ht_dev_num - 1] = CONFIG_HT_CHAIN_END_UNITID_BASE;
+		ht_unitid_base[ht_dev_num - 1] = HT_CHAIN_END_UNITID_BASE;
 
 		next_unitid = real_last_unitid;
 	}
diff --git a/include/arch/x86/amd/k8/k8.h b/include/arch/x86/amd/k8/k8.h
index e2969691c1..4307420f6b 100644
--- a/include/arch/x86/amd/k8/k8.h
+++ b/include/arch/x86/amd/k8/k8.h
@@ -19,9 +19,6 @@
  */
 
 /* Until we resolve a better way to do this, work around it with a value "too large to fail" */
-#warning clean up setting of DIMM_SOCKETS and NODE_NUMS
-#define DIMM_SOCKETS 4
-#define NODE_NUMS 16
 
 /* Socket types */
 #define SOCKET_AM2 0x11
diff --git a/mainboard/amd/serengeti/initram.c b/mainboard/amd/serengeti/initram.c
index caa33d4a40..9a15b66937 100644
--- a/mainboard/amd/serengeti/initram.c
+++ b/mainboard/amd/serengeti/initram.c
@@ -21,6 +21,7 @@
 
 #define _MAINOBJECT
 
+#include <mainboard.h>
 #include <types.h>
 #include <lib.h>
 #include <console.h>
diff --git a/mainboard/amd/serengeti/mainboard.h b/mainboard/amd/serengeti/mainboard.h
index a8ac278fd4..ad4064cb09 100644
--- a/mainboard/amd/serengeti/mainboard.h
+++ b/mainboard/amd/serengeti/mainboard.h
@@ -21,7 +21,13 @@
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
  */
 
+#define DIMM_SOCKETS 4
+#define NODE_NUMS 16
 #define CPU_SOCKET_TYPE SOCKET_AM2
 #define MEM_TRAIN_SEQ 0 /* for now */
 #define HW_MEM_HOLE_SIZE_AUTO_INC 0
 #define HW_MEM_HOLE_SIZEK 0x100000
+#define HT_CHAIN_UNITID_BASE 0xa
+#define HT_CHAIN_END_UNITID_BASE 0x6
+#define SB_HT_CHAIN_ON_BUS0 2
+#define SB_HT_CHAIN_UNITID_OFFSET_ONLY 1
diff --git a/mainboard/amd/serengeti/stage1.c b/mainboard/amd/serengeti/stage1.c
index bea91ff1e8..d8bcfdd40f 100644
--- a/mainboard/amd/serengeti/stage1.c
+++ b/mainboard/amd/serengeti/stage1.c
@@ -19,6 +19,7 @@
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
  */
 
+#include <mainboard.h>
 #include <types.h>
 #include <lib.h>
 #include <console.h>
diff --git a/northbridge/amd/k8/coherent_ht.c b/northbridge/amd/k8/coherent_ht.c
index ba52894db1..e0ce04ee6f 100644
--- a/northbridge/amd/k8/coherent_ht.c
+++ b/northbridge/amd/k8/coherent_ht.c
@@ -76,6 +76,7 @@
 			CPU1-------------CPU0     	
  */
 
+#include <mainboard.h>
 #include <console.h>
 #include <mtrr.h>
 #include <macros.h>
diff --git a/northbridge/amd/k8/common.c b/northbridge/amd/k8/common.c
index d56b6de06f..7fc6f242ca 100644
--- a/northbridge/amd/k8/common.c
+++ b/northbridge/amd/k8/common.c
@@ -28,6 +28,7 @@
 	2005.11 yhlu add put sb ht chain on bus 0
 */
 
+#include <mainboard.h>
 #include <console.h>
 #include <lib.h>
 #include <string.h>
diff --git a/northbridge/amd/k8/cpu.c b/northbridge/amd/k8/cpu.c
index 73c4a752f4..fb1451f892 100644
--- a/northbridge/amd/k8/cpu.c
+++ b/northbridge/amd/k8/cpu.c
@@ -28,6 +28,7 @@
 	2005.11 yhlu add put sb ht chain on bus 0
 */
 
+#include <mainboard.h>
 #include <config.h>
 #include <console.h>
 #include <lib.h>
diff --git a/northbridge/amd/k8/domain.c b/northbridge/amd/k8/domain.c
index 0c6b5226f2..b6b4fdabab 100644
--- a/northbridge/amd/k8/domain.c
+++ b/northbridge/amd/k8/domain.c
@@ -28,6 +28,7 @@
 	2005.11 yhlu add put sb ht chain on bus 0
 */
 
+#include <mainboard.h>
 #include <console.h>
 #include <lib.h>
 #include <string.h>
@@ -44,7 +45,6 @@
 #include <mc146818rtc.h>
 #include <lib.h>
 #include  <lapic.h>
-#include <mainboard.h>
 
 #ifdef CONFIG_PCI_64BIT_PREF_MEM
 #define BRIDGE_IO_MASK (IORESOURCE_IO | IORESOURCE_MEM | IORESOURCE_PREFETCH)
diff --git a/northbridge/amd/k8/dqs.c b/northbridge/amd/k8/dqs.c
index c2d2fda6d6..fadacbb41f 100644
--- a/northbridge/amd/k8/dqs.c
+++ b/northbridge/amd/k8/dqs.c
@@ -19,6 +19,7 @@
  * along with this program; if not, write to the Free Software
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA, 02110-1301 USA
  */
+#include <mainboard.h>
 #include <console.h>
 #include <string.h>
 #include <mtrr.h>
@@ -32,7 +33,6 @@
 #include <pci_ops.h>
 #include <mc146818rtc.h>
 #include <lib.h>
-#include <mainboard.h>
 
 #include <spd_ddr2.h>
 /*
diff --git a/northbridge/amd/k8/get_sblk_pci1234.c b/northbridge/amd/k8/get_sblk_pci1234.c
index 9c2c5458e0..8dd741f6cf 100644
--- a/northbridge/amd/k8/get_sblk_pci1234.c
+++ b/northbridge/amd/k8/get_sblk_pci1234.c
@@ -23,6 +23,7 @@
 // 2005.9 yhlu    modify that to more dynamic for AMD Opteron Based MB
 // 2007.9 stepan  improve code documentation
 
+#include <mainboard.h>
 #include <console.h>
 #include <mtrr.h>
 #include <macros.h>
diff --git a/northbridge/amd/k8/incoherent_ht.c b/northbridge/amd/k8/incoherent_ht.c
index 2f7c02cc82..a32f97ca30 100644
--- a/northbridge/amd/k8/incoherent_ht.c
+++ b/northbridge/amd/k8/incoherent_ht.c
@@ -24,6 +24,7 @@
 	2004.12 yhlu add multi ht chain dynamically support
 	2005.11 yhlu add let real sb to use small unitid
 */
+#include <mainboard.h>
 #include <console.h>
 #include <mtrr.h>
 #include <macros.h>
@@ -36,7 +37,6 @@
 #include <device/hypertransport_def.h>
 #include <mc146818rtc.h>
 #include <lib.h>
-
 static void print_linkn_in (const char *strval, u8 byteval)
 {
 	printk(BIOS_DEBUG, "%s%02x\n", strval, byteval); 
@@ -91,14 +91,14 @@ static void ht_collapse_previous_enumeration(u8 bus, unsigned offset_unitid)
 	u32 id;
 
 	//actually, only for one HT device HT chain, and unitid is 0
-#if CONFIG_HT_CHAIN_UNITID_BASE == 0
+#if HT_CHAIN_UNITID_BASE == 0
 	if(offset_unitid) {
 		return;
 	}
 #endif
 
 	/* Check if is already collapsed */
-	if((!offset_unitid) || (offset_unitid && (!((CONFIG_HT_CHAIN_END_UNITID_BASE == 0) && (CONFIG_HT_CHAIN_END_UNITID_BASE <CONFIG_HT_CHAIN_UNITID_BASE))))) {
+	if((!offset_unitid) || (offset_unitid && (!((HT_CHAIN_END_UNITID_BASE == 0) && (HT_CHAIN_END_UNITID_BASE <HT_CHAIN_UNITID_BASE))))) {
 		bdf = PCI_BDF(bus, 0, 0);
         	id = pci_conf1_read_config32(bdf, PCI_VENDOR_ID);
 	        if ( ! ( (id == 0xffffffff) || (id == 0x00000000) ||
@@ -389,23 +389,23 @@ int scan_pci_bus( unsigned bus , struct sys_info *sysinfo)
 void ht_setup_chainx(u32 bdf, u8 upos, u8 bus, 
 	unsigned offset_unitid, struct sys_info *sysinfo)
 {
-	//even CONFIG_HT_CHAIN_UNITID_BASE == 0, we still can go through this function, because of end_of_chain check, also We need it to optimize link
+	//even HT_CHAIN_UNITID_BASE == 0, we still can go through this function, because of end_of_chain check, also We need it to optimize link
 
 	u8 next_unitid, last_unitid;
 	unsigned uoffs;
 
-#if CONFIG_HT_CHAIN_END_UNITID_BASE != 0x20
+#if HT_CHAIN_END_UNITID_BASE != 0x20
         /* let's record the device of last ht device, 
-	 * So we can set the Unitid to CONFIG_HT_CHAIN_END_UNITID_BASE
+	 * So we can set the Unitid to HT_CHAIN_END_UNITID_BASE
 	 */
-        unsigned real_last_unitid;
-        u8 real_last_pos;
+        unsigned real_last_unitid = 0;
+        u8 real_last_pos = 0;
 	int ht_dev_num = 0;
 	u8 end_used = 0;
 #endif
 
 	uoffs = PCI_HT_HOST_OFFS;
-	next_unitid = (offset_unitid) ? CONFIG_HT_CHAIN_UNITID_BASE:1;
+	next_unitid = (offset_unitid) ? HT_CHAIN_UNITID_BASE:1;
 
 	do {
 		u32 id;
@@ -461,11 +461,11 @@ void ht_setup_chainx(u32 bdf, u8 upos, u8 bus,
 		}
 
 
-#if CONFIG_HT_CHAIN_END_UNITID_BASE != 0x20
+#if HT_CHAIN_END_UNITID_BASE != 0x20
 		if(offset_unitid) {
 			if(next_unitid>= (bus ? 0x20:0x18) ) {
 				if(!end_used) {
-			                next_unitid = CONFIG_HT_CHAIN_END_UNITID_BASE;
+			                next_unitid = HT_CHAIN_END_UNITID_BASE;
 					end_used = 1;
 				} else {
 					goto out;
@@ -517,18 +517,18 @@ void ht_setup_chainx(u32 bdf, u8 upos, u8 bus,
 
 	} while (last_unitid != next_unitid );
 
-#if CONFIG_HT_CHAIN_END_UNITID_BASE != 0x20
+#if HT_CHAIN_END_UNITID_BASE != 0x20
 out:
 #endif
 end_of_chain: ;
 	
-#if CONFIG_HT_CHAIN_END_UNITID_BASE != 0x20
-        if(offset_unitid && (ht_dev_num>1) && (real_last_unitid != CONFIG_HT_CHAIN_END_UNITID_BASE) && !end_used ) {
+#if HT_CHAIN_END_UNITID_BASE != 0x20
+        if(offset_unitid && (ht_dev_num>1) && (real_last_unitid != HT_CHAIN_END_UNITID_BASE) && !end_used ) {
                 u16 flags;
 		int i;
                 flags = pci_conf1_read_config16(PCI_BDF(bus,real_last_unitid,0), real_last_pos + PCI_CAP_FLAGS);
                 flags &= ~0x1f;
-                flags |= CONFIG_HT_CHAIN_END_UNITID_BASE & 0x1f;
+                flags |= HT_CHAIN_END_UNITID_BASE & 0x1f;
                 pci_conf1_write_config16(PCI_BDF(bus, real_last_unitid, 0), real_last_pos + PCI_CAP_FLAGS, flags);
 
 		// Here need to change the dev in the array
@@ -536,11 +536,11 @@ end_of_chain: ;
                 {
                         struct link_pair_st *link_pair = &sysinfo->link_pair[i];
                         if(link_pair->udev == PCI_BDF(bus, real_last_unitid, 0)) {
-				link_pair->udev = PCI_BDF(bus, CONFIG_HT_CHAIN_END_UNITID_BASE, 0);
+				link_pair->udev = PCI_BDF(bus, HT_CHAIN_END_UNITID_BASE, 0);
 				continue;
 			}
                         if(link_pair->dev == PCI_BDF(bus, real_last_unitid, 0)) {
-                                link_pair->dev = PCI_BDF(bus, CONFIG_HT_CHAIN_END_UNITID_BASE, 0);
+                                link_pair->dev = PCI_BDF(bus, HT_CHAIN_END_UNITID_BASE, 0);
                         }
                 }
 
@@ -552,7 +552,7 @@ end_of_chain: ;
 void ht_setup_chain(u32 bdf, unsigned upos, struct sys_info *sysinfo)
 {
 	unsigned offset_unitid = 0;
-#if ((CONFIG_HT_CHAIN_UNITID_BASE != 1) || (CONFIG_HT_CHAIN_END_UNITID_BASE != 0x20))
+#if ((HT_CHAIN_UNITID_BASE != 1) || (HT_CHAIN_END_UNITID_BASE != 0x20))
         offset_unitid = 1;
 #endif
 
@@ -565,7 +565,7 @@ void ht_setup_chain(u32 bdf, unsigned upos, struct sys_info *sysinfo)
         /* Make certain the HT bus is not enumerated */
         ht_collapse_previous_enumeration(0, 0);
 
-#if ((CONFIG_HT_CHAIN_UNITID_BASE != 1) || (CONFIG_HT_CHAIN_END_UNITID_BASE != 0x20))
+#if ((HT_CHAIN_UNITID_BASE != 1) || (HT_CHAIN_END_UNITID_BASE != 0x20))
         offset_unitid = 1;
 #endif
 
@@ -610,11 +610,11 @@ static int optimize_link_read_pointers_chain(u8 ht_c_num)
 		u8 val;
 		unsigned devn = 1;
 
-	#if ((CONFIG_HT_CHAIN_UNITID_BASE != 1) || (CONFIG_HT_CHAIN_END_UNITID_BASE != 0x20))
-                #if CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY == 1
+	#if ((HT_CHAIN_UNITID_BASE != 1) || (HT_CHAIN_END_UNITID_BASE != 0x20))
+                #if SB_HT_CHAIN_UNITID_OFFSET_ONLY == 1
                 if(i==0) // to check if it is sb ht chain
                 #endif
-                        devn = CONFIG_HT_CHAIN_UNITID_BASE;
+                        devn = HT_CHAIN_UNITID_BASE;
         #endif
 
 		reg = pci_conf1_read_config32(PCI_BDF(0,0x18,1), 0xe0 + i * 4);
@@ -733,8 +733,8 @@ static void ht_setup_chains(u8 ht_c_num, struct sys_info *sysinfo)
 		pci_conf1_write_config32( PCI_BDF(0, devpos,0), regpos , dword);
 	
 
-	#if ((CONFIG_HT_CHAIN_UNITID_BASE != 1) || (CONFIG_HT_CHAIN_END_UNITID_BASE != 0x20))
-                #if CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY == 1
+	#if ((HT_CHAIN_UNITID_BASE != 1) || (HT_CHAIN_END_UNITID_BASE != 0x20))
+                #if SB_HT_CHAIN_UNITID_OFFSET_ONLY == 1
                 if(i==0) // to check if it is sb ht chain
                 #endif
                         offset_unitid = 1;
diff --git a/northbridge/amd/k8/libstage1.c b/northbridge/amd/k8/libstage1.c
index 99de7bd21c..213aa53c89 100644
--- a/northbridge/amd/k8/libstage1.c
+++ b/northbridge/amd/k8/libstage1.c
@@ -25,6 +25,7 @@
 	2005.02 yhlu add E0 memory hole support
 */
 
+#include <mainboard.h>
 #include <console.h>
 #include <mtrr.h>
 #include <macros.h>
@@ -134,7 +135,7 @@ u8 get_sbbusn(unsigned int sblk)
 void enumerate_ht_chain(void)
 {
 #if HT_CHAIN_UNITID_BASE != 0
-/* HT_CHAIN_UNITID_BASE could be 0 (only one ht device in the ht chain), if so, don't need to go through the chain  */
+/*  HT_CHAIN_UNITID_BASE could be 0 (only one ht device in the ht chain), if so, don't need to go through the chain  */
 
 	/* Assumption the HT chain that is bus 0 has the HT I/O Hub on it.
 	 * On most boards this just happens.  If a cpu has multiple
@@ -143,22 +144,24 @@ void enumerate_ht_chain(void)
 	 */
 	unsigned next_unitid, last_unitid;
 	u32 dev;
-#if HT_CHAIN_END_UNITID_BASE != 0x20
-	//let's record the device of last ht device, So we can set the Unitid to HT_CHAIN_END_UNITID_BASE
-	unsigned real_last_unitid;
-	u8 real_last_pos;
+#if  HT_CHAIN_END_UNITID_BASE != 0x20
+	//let's record the device of last ht device, So we can set the Unitid to  HT_CHAIN_END_UNITID_BASE
+	unsigned real_last_unitid = 0;
+	u8 real_last_pos = 0;
 	int ht_dev_num = 0;	// except host_bridge
 	u8 end_used = 0;
 #endif
 
 	dev = PCI_BDF(0, 0, 0);
-	next_unitid = HT_CHAIN_UNITID_BASE;
+	next_unitid =  HT_CHAIN_UNITID_BASE;
 	do {
 		u32 id;
 		u8 hdr_type, pos;
+		printk(BIOS_SPEW, "dev 0x%x unitid %d: ", dev, next_unitid);
 		last_unitid = next_unitid;
 
 		id = pci_conf1_read_config32(dev, PCI_VENDOR_ID);
+		printk(BIOS_SPEW, "id 0x%x\n", id);
 		/* If the chain is enumerated quit */
 		if (((id & 0xffff) == 0x0000) || ((id & 0xffff) == 0xffff)
 		    || (((id >> 16) & 0xffff) == 0xffff)
@@ -166,7 +169,7 @@ void enumerate_ht_chain(void)
 			break;
 		}
 
-		hdr_type = pci_con1_read_config8(dev, PCI_HEADER_TYPE);
+		hdr_type = pci_conf1_read_config8(dev, PCI_HEADER_TYPE);
 		pos = 0;
 		hdr_type &= 0x7f;
 
@@ -183,6 +186,7 @@ void enumerate_ht_chain(void)
 						   pos + PCI_CAP_LIST_ID);
 			if (cap == PCI_CAP_ID_HT) {
 				u16 flags;
+				printk(BIOS_SPEW, "Found CAP HT\n");
 				/* Read and write and reread flags so the link
 				 * direction bit is valid.
 				 */
@@ -190,7 +194,7 @@ void enumerate_ht_chain(void)
 				    pci_conf1_read_config16(dev,
 							    pos +
 							    PCI_CAP_FLAGS);
-				pci_write_conf1_config16(dev,
+				pci_conf1_write_config16(dev,
 							 pos +
 							 PCI_CAP_FLAGS,
 							 flags);
@@ -203,11 +207,11 @@ void enumerate_ht_chain(void)
 					unsigned ctrl, ctrl_off;
 					u32 devx;
 
-#if HT_CHAIN_END_UNITID_BASE != 0x20
+#if  HT_CHAIN_END_UNITID_BASE != 0x20
 					if (next_unitid >= 0x18) {	// don't get mask out by k8, at this time BSP, RT is not enabled, it will response from 0x18,0--0x1f.
 						if (!end_used) {
 							next_unitid =
-							    HT_CHAIN_END_UNITID_BASE;
+							     HT_CHAIN_END_UNITID_BASE;
 							end_used = 1;
 						} else {
 							goto out;
@@ -228,6 +232,7 @@ void enumerate_ht_chain(void)
 								 PCI_CAP_FLAGS,
 								 flags);
 
+					printk(BIOS_SPEW, "devx 0x%x\n", devx);
 					next_unitid += count;
 
 					flags =
@@ -239,7 +244,7 @@ void enumerate_ht_chain(void)
 
 					do {
 						ctrl =
-						    pci_read_config16(devx,
+						    pci_conf1_read_config16(devx,
 								      pos +
 								      ctrl_off);
 						/* Is this the end of the hypertransport chain? */
@@ -258,13 +263,13 @@ void enumerate_ht_chain(void)
 							 * if its transient
 							 */
 							ctrl |= ((1 << 4) | (1 << 8));	// Link fail + Crc
-							pci_write_config16
+							pci_conf1_write_config16
 							    (devx,
 							     pos +
 							     ctrl_off,
 							     ctrl);
 							ctrl =
-							    pci_read_config16
+							    pci_conf1_read_config16
 							    (devx,
 							     pos +
 							     ctrl_off);
@@ -290,9 +295,9 @@ void enumerate_ht_chain(void)
       out:
 	;
 
-#if HT_CHAIN_END_UNITID_BASE != 0x20
+#if  HT_CHAIN_END_UNITID_BASE != 0x20
 	if ((ht_dev_num > 1)
-	    && (real_last_unitid != HT_CHAIN_END_UNITID_BASE)
+	    && (real_last_unitid !=  HT_CHAIN_END_UNITID_BASE)
 	    && !end_used) {
 		u16 flags;
 		dev = PCI_BDF(0, real_last_unitid, 0);
@@ -300,13 +305,15 @@ void enumerate_ht_chain(void)
 		    pci_conf1_read_config16(dev,
 					    real_last_pos + PCI_CAP_FLAGS);
 		flags &= ~0x1f;
-		flags |= HT_CHAIN_END_UNITID_BASE & 0x1f;
+		flags |=  HT_CHAIN_END_UNITID_BASE & 0x1f;
 		pci_conf1_write_config16(dev,
 					 real_last_pos + PCI_CAP_FLAGS,
 					 flags);
 	}
 #endif
 
+	printk(BIOS_SPEW, "Done: ht_dev_num %d, real_last_pos %d\n",
+			ht_dev_num, real_last_pos);
 #endif
 
 }
diff --git a/northbridge/amd/k8/pci.c b/northbridge/amd/k8/pci.c
index d6e1bc48fa..a2338d2316 100644
--- a/northbridge/amd/k8/pci.c
+++ b/northbridge/amd/k8/pci.c
@@ -28,6 +28,7 @@
 	2005.11 yhlu add put sb ht chain on bus 0
 */
 
+#include <mainboard.h>
 #include <console.h>
 #include <lib.h>
 #include <string.h>
@@ -110,12 +111,12 @@ static unsigned int amdk8_scan_chain(struct device * dev, unsigned nodeid, unsig
 		 * We have no idea how many busses are behind this bridge yet,
 		 * so we set the subordinate bus number to 0xff for the moment.
 		 */
-#if CONFIG_SB_HT_CHAIN_ON_BUS0 > 0
+#if SB_HT_CHAIN_ON_BUS0 > 0
                 // first chain will on bus 0
 		if((nodeid == 0) && (sblink==link)) { // actually max is 0 here
                         min_bus = max;
                 } 
-	#if CONFIG_SB_HT_CHAIN_ON_BUS0 > 1
+	#if SB_HT_CHAIN_ON_BUS0 > 1
 		// second chain will be on 0x40, third 0x80, forth 0xc0
                 else {
                         min_bus = ((max>>6) + 1) * 0x40; 
@@ -212,8 +213,8 @@ static unsigned int amdk8_scan_chains(struct device * dev, unsigned int max)
 	
         if(nodeid==0) {
                 sblink = (pci_read_config32(dev, 0x64)>>8) & 3;
-#if CONFIG_SB_HT_CHAIN_ON_BUS0 > 0
-	#if ((CONFIG_HT_CHAIN_UNITID_BASE != 1) || (CONFIG_HT_CHAIN_END_UNITID_BASE != 0x20))
+#if SB_HT_CHAIN_ON_BUS0 > 0
+	#if ((HT_CHAIN_UNITID_BASE != 1) || (HT_CHAIN_END_UNITID_BASE != 0x20))
                 offset_unitid = 1;
         #endif
 		// do southbridge ht chain first, in case s2885 put southbridge chain (8131/8111) on link2, 
@@ -223,12 +224,12 @@ static unsigned int amdk8_scan_chains(struct device * dev, unsigned int max)
         }
 
         for(link = 0; link < dev->links; link++) {
-#if CONFIG_SB_HT_CHAIN_ON_BUS0 > 0
+#if SB_HT_CHAIN_ON_BUS0 > 0
 		if( (nodeid == 0) && (sblink == link) ) continue; //already done
 #endif
 		offset_unitid = 0;
-		#if ((CONFIG_HT_CHAIN_UNITID_BASE != 1) || (CONFIG_HT_CHAIN_END_UNITID_BASE != 0x20))
-	                #if CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY == 1
+		#if ((HT_CHAIN_UNITID_BASE != 1) || (HT_CHAIN_END_UNITID_BASE != 0x20))
+	                #if SB_HT_CHAIN_UNITID_OFFSET_ONLY == 1
 			if((nodeid == 0) && (sblink == link))
 			#endif
 				offset_unitid = 1;
diff --git a/northbridge/amd/k8/raminit.c b/northbridge/amd/k8/raminit.c
index 5b9186fd09..ba9954a1ce 100644
--- a/northbridge/amd/k8/raminit.c
+++ b/northbridge/amd/k8/raminit.c
@@ -26,6 +26,7 @@
 	2005.10 yhlu make it support DDR2 only
 */
 
+#include <mainboard.h>
 #include <console.h>
 #include <string.h>
 #include <mtrr.h>
@@ -39,7 +40,6 @@
 #include <pci_ops.h>
 #include <mc146818rtc.h>
 #include <lib.h>
-#include <mainboard.h>
 
 #include <spd_ddr2.h>