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arm64: 16 byte alignment and ramstage start address

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To align with arm use the RAMSTAGE_BASE Kconfig option
for start of ramstage. Also, use 16-byte alignment for the
start and end of the secions. 4 bytes were previously used, but
it definitely seems more appropriate to at least have the heap
handing out 16-byte aligned pointers.

BUG=chrome-os-partner:29923
BRANCH=None
TEST=Built and booted through attempting to load payload

Change-Id: I39329055696ae21a9ed1d9a64769981ab4dcdddd
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/207432
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
This commit is contained in:
Aaron Durbin 2014-07-10 17:04:25 -05:00 • committed by chrome-internal-fetch
commit 6291f3bed7
1 changed files with 12 additions and 11 deletions
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23
src/arch/arm64/ramstage.ld
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@ -32,7 +32,7 @@ PHDRS
SECTIONS
{
. = CONFIG_SYS_SDRAM_BASE;
. = CONFIG_RAMSTAGE_BASE;
/* First we place the code and read only data (typically const declared).
* This could theoretically be placed in rom.
*/
@ -56,11 +56,11 @@ SECTIONS
.rodata : {
_rodata = .;
. = ALIGN(4);
. = ALIGN(16);
console_drivers = .;
KEEP(*(.rodata.console_drivers));
econsole_drivers = . ;
. = ALIGN(4);
. = ALIGN(16);
pci_drivers = . ;
KEEP(*(.rodata.pci_driver));
epci_drivers = . ;
@ -75,7 +75,7 @@ SECTIONS
/* kevinh/Ispiri - Added an align, because the objcopy tool
* incorrectly converts sections that are not long word aligned.
*/
. = ALIGN(4);
. = ALIGN(16);
_erodata = .;
}
@ -100,6 +100,7 @@ SECTIONS
*(.bss)
*(.sbss)
*(COMMON)
. = ALIGN(16);
}
_ebss = .;
_end = .;
@ -108,13 +109,13 @@ SECTIONS
* this line.
*/
_heap = .;
.heap . : {
/* Reserve CONFIG_HEAP_SIZE bytes for the heap */
. = CONFIG_HEAP_SIZE ;
. = ALIGN(4);
}
_eheap = .;
_heap = .;
.heap . : {
/* Reserve CONFIG_HEAP_SIZE bytes for the heap */
. = CONFIG_HEAP_SIZE ;
. = ALIGN(16);
}
_eheap = .;
/* arm64 chipsets need to define CONFIG_RAMSTAGE_STACK_(TOP|BOTTOM) */
_stack = CONFIG_RAMSTAGE_STACK_BOTTOM;