From 626789b40a830d6859d76baec819b390104b9c59 Mon Sep 17 00:00:00 2001 From: Uwe Poeche Date: Tue, 2 Dec 2025 14:21:19 +0100 Subject: [PATCH] mb/siemens/mc_ehl{1..5}: Unify devicetrees SerialIoI2cPadsTermination Unify the I2C pad termination on all mc_ehl boards for better code readability and continuity in the devicetrees. This patch does not change the actual I2C pad termination configuration. All the mc_ehl boards use external resistors for I2C termination. Therefore, there is no need for internal termination at all. If the FSP parameter 'SerialIoI2cPadsTermination' is omitted from the device tree, the generic GPIO settings can define termination. If 'SerialIoI2cPadsTermination' is specified for an inactive I2C controller, those settings are ignored. This patch consistently adds 'SerialIoI2cPadsTermination' to the device tree for all active mc_ehl boards, and removes it for controllers that are switched off. This topic came up in review for commit 864e3ca66145 ("mb/siemens/mc_ehl6: Adjust I2C setup"). TEST=Build and boot to OS on mc_ehl1/2/4 and compare register contents of PAD_CFG_DW0/1 registers for all 8 I2C controllers before and after the patch to ensure no change in I2C pad termination. Change-Id: Iba75778893e0b6a7acb68535d0407dc1fc43d2ca Signed-off-by: Uwe Poeche Reviewed-on: https://review.coreboot.org/c/coreboot/+/90364 Tested-by: build bot (Jenkins) Reviewed-by: Mario Scheithauer --- .../siemens/mc_ehl/variants/mc_ehl1/devicetree.cb | 6 ------ .../siemens/mc_ehl/variants/mc_ehl2/devicetree.cb | 9 +++++++++ .../siemens/mc_ehl/variants/mc_ehl3/devicetree.cb | 9 +++++++++ .../siemens/mc_ehl/variants/mc_ehl4/devicetree.cb | 6 ------ .../siemens/mc_ehl/variants/mc_ehl5/devicetree.cb | 9 +++++++++ 5 files changed, 27 insertions(+), 12 deletions(-) diff --git a/src/mainboard/siemens/mc_ehl/variants/mc_ehl1/devicetree.cb b/src/mainboard/siemens/mc_ehl/variants/mc_ehl1/devicetree.cb index 60c4b474c7..6e85734887 100644 --- a/src/mainboard/siemens/mc_ehl/variants/mc_ehl1/devicetree.cb +++ b/src/mainboard/siemens/mc_ehl/variants/mc_ehl1/devicetree.cb @@ -95,14 +95,8 @@ chip soc/intel/elkhartlake }" register "SerialIoI2cPadsTermination" = "{ - [PchSerialIoIndexI2C0] = 1, [PchSerialIoIndexI2C1] = 1, - [PchSerialIoIndexI2C2] = 1, - [PchSerialIoIndexI2C3] = 1, [PchSerialIoIndexI2C4] = 1, - [PchSerialIoIndexI2C5] = 1, - [PchSerialIoIndexI2C6] = 1, - [PchSerialIoIndexI2C7] = 1, }" register "SerialIoUartMode" = "{ diff --git a/src/mainboard/siemens/mc_ehl/variants/mc_ehl2/devicetree.cb b/src/mainboard/siemens/mc_ehl/variants/mc_ehl2/devicetree.cb index 67ece6d158..4a7a997446 100644 --- a/src/mainboard/siemens/mc_ehl/variants/mc_ehl2/devicetree.cb +++ b/src/mainboard/siemens/mc_ehl/variants/mc_ehl2/devicetree.cb @@ -82,6 +82,15 @@ chip soc/intel/elkhartlake [PchSerialIoIndexI2C7] = PchSerialIoDisabled, }" + register "SerialIoI2cPadsTermination" = "{ + [PchSerialIoIndexI2C0] = 1, + [PchSerialIoIndexI2C1] = 1, + [PchSerialIoIndexI2C2] = 1, + [PchSerialIoIndexI2C3] = 1, + [PchSerialIoIndexI2C4] = 1, + [PchSerialIoIndexI2C5] = 1, + }" + register "SerialIoUartMode" = "{ [PchSerialIoIndexUART0] = PchSerialIoPci, [PchSerialIoIndexUART1] = PchSerialIoPci, diff --git a/src/mainboard/siemens/mc_ehl/variants/mc_ehl3/devicetree.cb b/src/mainboard/siemens/mc_ehl/variants/mc_ehl3/devicetree.cb index 54bd62b0f1..71baa47b11 100644 --- a/src/mainboard/siemens/mc_ehl/variants/mc_ehl3/devicetree.cb +++ b/src/mainboard/siemens/mc_ehl/variants/mc_ehl3/devicetree.cb @@ -84,6 +84,15 @@ chip soc/intel/elkhartlake [PchSerialIoIndexI2C7] = PchSerialIoDisabled, }" + register "SerialIoI2cPadsTermination" = "{ + [PchSerialIoIndexI2C0] = 1, + [PchSerialIoIndexI2C1] = 1, + [PchSerialIoIndexI2C2] = 1, + [PchSerialIoIndexI2C3] = 1, + [PchSerialIoIndexI2C4] = 1, + [PchSerialIoIndexI2C5] = 1, + }" + register "SerialIoUartMode" = "{ [PchSerialIoIndexUART0] = PchSerialIoPci, [PchSerialIoIndexUART1] = PchSerialIoPci, diff --git a/src/mainboard/siemens/mc_ehl/variants/mc_ehl4/devicetree.cb b/src/mainboard/siemens/mc_ehl/variants/mc_ehl4/devicetree.cb index 17d6780d37..f17052076a 100644 --- a/src/mainboard/siemens/mc_ehl/variants/mc_ehl4/devicetree.cb +++ b/src/mainboard/siemens/mc_ehl/variants/mc_ehl4/devicetree.cb @@ -102,14 +102,8 @@ chip soc/intel/elkhartlake }" register "SerialIoI2cPadsTermination" = "{ - [PchSerialIoIndexI2C0] = 1, [PchSerialIoIndexI2C1] = 1, - [PchSerialIoIndexI2C2] = 1, - [PchSerialIoIndexI2C3] = 1, [PchSerialIoIndexI2C4] = 1, - [PchSerialIoIndexI2C5] = 1, - [PchSerialIoIndexI2C6] = 1, - [PchSerialIoIndexI2C7] = 1, }" register "SerialIoUartMode" = "{ diff --git a/src/mainboard/siemens/mc_ehl/variants/mc_ehl5/devicetree.cb b/src/mainboard/siemens/mc_ehl/variants/mc_ehl5/devicetree.cb index 5998e0e09d..bcd76cb991 100644 --- a/src/mainboard/siemens/mc_ehl/variants/mc_ehl5/devicetree.cb +++ b/src/mainboard/siemens/mc_ehl/variants/mc_ehl5/devicetree.cb @@ -82,6 +82,15 @@ chip soc/intel/elkhartlake [PchSerialIoIndexI2C7] = PchSerialIoDisabled, }" + register "SerialIoI2cPadsTermination" = "{ + [PchSerialIoIndexI2C0] = 1, + [PchSerialIoIndexI2C1] = 1, + [PchSerialIoIndexI2C2] = 1, + [PchSerialIoIndexI2C3] = 1, + [PchSerialIoIndexI2C4] = 1, + [PchSerialIoIndexI2C5] = 1, + }" + register "SerialIoUartMode" = "{ [PchSerialIoIndexUART0] = PchSerialIoPci, [PchSerialIoIndexUART1] = PchSerialIoPci,