From 6220b632e7c3742b6a4ecaac864e068a9dfe212d Mon Sep 17 00:00:00 2001 From: Stefan Reinauer Date: Sun, 27 Jan 2008 18:54:57 +0000 Subject: [PATCH] Now version 3: LinuxBIOS -> coreboot rename. - I left LB_TAG_ intact because they are used by the payloads - file renames are still missing. see next commit - some lb_ renames might be missing. feel free to provide patches. Signed-off-by: Stefan Reinauer Acked-by: Stefan Reinauer git-svn-id: svn://coreboot.org/repository/coreboot-v3@564 f3766cd6-281f-0410-b1cd-43a5c92072e9 --- HACKING | 8 +- Kconfig | 28 ++--- Makefile | 36 +++--- README | 54 ++++----- Rules.make | 4 +- arch/x86/Kconfig | 4 +- arch/x86/Makefile | 60 +++++----- arch/x86/archtables.c | 11 +- arch/x86/geodelx/cpu.c | 2 +- arch/x86/geodelx/geodelx.c | 2 +- arch/x86/geodelx/stage0.S | 4 +- arch/x86/geodelx/stage1.c | 2 +- arch/x86/i8259.c | 2 +- arch/x86/ldscript.ld | 2 +- arch/x86/linuxbios_table.c | 46 +++---- arch/x86/macros.h | 2 +- arch/x86/mc146818rtc.c | 22 ++-- arch/x86/post_code.c | 2 +- arch/x86/serial.c | 2 +- arch/x86/speaker.c | 2 +- arch/x86/stage0_i586.S | 2 +- arch/x86/stage1.c | 4 +- arch/x86/udelay_io.c | 2 +- device/Kconfig | 2 +- device/Makefile | 2 +- device/agp_device.c | 2 +- device/cardbus_device.c | 2 +- device/device.c | 2 +- device/device_util.c | 2 +- device/hypertransport.c | 4 +- device/pci_device.c | 8 +- device/pci_ops.c | 2 +- device/pci_rom.c | 2 +- device/pcie_device.c | 2 +- device/pcix_device.c | 2 +- device/pnp_device.c | 2 +- device/pnp_raw.c | 2 +- device/root_device.c | 2 +- device/smbus_ops.c | 2 +- doc/design/flashlayout.fig | 4 +- doc/design/newboot.lyx | 112 +++++++++--------- include/arch/x86/amd_geodelx.h | 4 +- include/arch/x86/arch/spinlock.h | 2 +- include/arch/x86/cpu.h | 2 +- include/arch/x86/div64.h | 2 +- include/arch/x86/legacy.h | 2 +- include/arch/x86/msr.h | 2 +- include/arch/x86/swab.h | 2 +- include/device/device.h | 2 +- include/device/pci.h | 2 +- include/device/pci_ids.h | 4 +- include/elf.h | 6 +- include/ip_checksum.h | 2 +- include/isa-dma.h | 2 +- include/keyboard.h | 4 +- include/lar.h | 2 +- include/lib.h | 2 +- include/mc146818rtc.h | 14 +-- include/post_code.h | 2 +- include/shared.h | 2 +- include/spd.h | 2 +- include/spinlock.h | 2 +- include/string.h | 2 +- include/tables.h | 20 ++-- lib/Kconfig | 12 +- lib/Makefile | 2 +- lib/clog2.c | 2 +- lib/compute_ip_checksum.c | 2 +- lib/console.c | 8 +- lib/delay.c | 2 +- lib/elfboot.c | 4 +- lib/lar.c | 2 +- lib/lzma.c | 2 +- lib/mem.c | 2 +- lib/ram.c | 2 +- lib/stage2.c | 8 +- lib/string.c | 2 +- lib/tables.c | 4 +- lib/vsprintf.c | 2 +- lib/vtxprintf.c | 2 +- mainboard/Kconfig | 26 ++-- mainboard/adl/Kconfig | 2 +- mainboard/adl/msm800sev/Kconfig | 2 +- mainboard/adl/msm800sev/Makefile | 6 +- mainboard/adl/msm800sev/dts | 2 +- mainboard/adl/msm800sev/initram.c | 2 +- mainboard/adl/msm800sev/stage1.c | 2 +- mainboard/amd/Kconfig | 2 +- mainboard/amd/norwich/Kconfig | 2 +- mainboard/amd/norwich/Makefile | 6 +- mainboard/amd/norwich/dts | 2 +- mainboard/amd/norwich/initram.c | 2 +- mainboard/amd/norwich/stage1.c | 2 +- mainboard/artecgroup/Kconfig | 2 +- mainboard/artecgroup/dbe61/Kconfig | 2 +- mainboard/artecgroup/dbe61/Makefile | 6 +- mainboard/artecgroup/dbe61/dts | 2 +- mainboard/artecgroup/dbe61/initram.c | 2 +- mainboard/artecgroup/dbe61/stage1.c | 2 +- mainboard/emulation/Kconfig | 2 +- mainboard/emulation/qemu-x86/Kconfig | 2 +- mainboard/emulation/qemu-x86/Makefile | 6 +- mainboard/emulation/qemu-x86/dts | 2 +- mainboard/emulation/qemu-x86/initram.c | 2 +- .../emulation/qemu-x86/initram_printktest.c | 2 +- mainboard/emulation/qemu-x86/stage1.c | 2 +- mainboard/emulation/qemu-x86/vga.c | 2 +- mainboard/pcengines/Kconfig | 2 +- mainboard/pcengines/alix1c/Kconfig | 2 +- mainboard/pcengines/alix1c/Makefile | 6 +- mainboard/pcengines/alix1c/dts | 2 +- mainboard/pcengines/alix1c/initram.c | 2 +- mainboard/pcengines/alix1c/stage1.c | 2 +- northbridge/amd/geodelx/Makefile | 2 +- northbridge/amd/geodelx/dts | 2 +- northbridge/amd/geodelx/geodelx.c | 2 +- northbridge/amd/geodelx/geodelxinit.c | 2 +- northbridge/amd/geodelx/raminit.c | 2 +- northbridge/amd/geodelx/raminit.h | 2 +- northbridge/intel/i440bxemulation/Kconfig | 2 +- northbridge/intel/i440bxemulation/Makefile | 2 +- northbridge/intel/i440bxemulation/dts | 2 +- northbridge/intel/i440bxemulation/i440bx.c | 2 +- northbridge/intel/i440bxemulation/i440bx.h | 2 +- southbridge/amd/cs5536/Makefile | 2 +- southbridge/amd/cs5536/cs5536.c | 2 +- southbridge/amd/cs5536/cs5536.h | 2 +- southbridge/amd/cs5536/dts | 2 +- southbridge/amd/cs5536/smbus_initram.c | 2 +- southbridge/amd/cs5536/stage1.c | 2 +- southbridge/intel/i82371eb/Makefile | 2 +- southbridge/intel/i82371eb/dts | 2 +- southbridge/intel/i82371eb/i82371eb.c | 2 +- superio/fintek/f71805f/Makefile | 2 +- superio/fintek/f71805f/dts | 2 +- superio/fintek/f71805f/f71805f.h | 2 +- superio/fintek/f71805f/stage1.c | 2 +- superio/fintek/f71805f/superio.c | 2 +- superio/winbond/w83627hf/Makefile | 2 +- superio/winbond/w83627hf/dts | 2 +- superio/winbond/w83627hf/stage1.c | 2 +- superio/winbond/w83627hf/superio.c | 2 +- superio/winbond/w83627hf/w83627hf.h | 2 +- util/Makefile | 6 +- util/doxygen/Doxyfile.LinuxBIOS | 2 +- util/dtc/dtc.c | 10 +- util/dtc/dtc.h | 4 +- util/dtc/endian.h | 2 +- util/dtc/flattree.c | 54 ++++----- util/kconfig/confdata.c | 6 +- util/kconfig/gconf.c | 4 +- util/kconfig/mconf.c | 4 +- util/kconfig/util.c | 2 +- util/kconfig/zconf.tab.c_shipped | 2 +- util/kconfig/zconf.y | 2 +- util/lar/Makefile | 8 +- util/lar/README | 5 +- util/lar/bootblock.c | 2 +- util/lar/example.c | 2 +- util/lar/lar.c | 10 +- util/lar/lar.h | 4 +- util/lar/lib.c | 2 +- util/lar/lib.h | 2 +- util/lar/stream.c | 2 +- util/lzma/Makefile | 2 +- util/nrv2b/Makefile | 2 +- util/options/Makefile | 2 +- util/options/build_opt_tbl.c | 10 +- util/x86emu/Makefile | 2 +- util/x86emu/biosemu.c | 2 +- util/x86emu/include/x86emu/x86emu.h | 2 +- util/x86emu/pcbios/pcibios.c | 2 +- util/x86emu/pcbios/pcibios.h | 2 +- util/x86emu/vm86.c | 4 +- util/x86emu/x86emu/sys.c | 2 +- util/xcompile/xcompile | 4 +- 176 files changed, 472 insertions(+), 472 deletions(-) diff --git a/HACKING b/HACKING index 019d37f21c..7f9b1a8bcf 100644 --- a/HACKING +++ b/HACKING @@ -5,13 +5,13 @@ HACKING Development Guidelines ---------------------- -Please read http://linuxbios.org/Development_Guidelines. +Please read http://www.coreboot.org/Development_Guidelines. Doxygen-generated Code/API Documentation ---------------------------------------- -The source code of LinuxBIOS is documented using Doxygen-style code comments. +The source code of coreboot is documented using Doxygen-style code comments. The Doxygen tool can generate HTML API documentation out of these comments. You can generate this documentation via: @@ -22,7 +22,7 @@ The documentation will be stored in the doxygen/html directory. The generation of the documentation takes ca. 1-2 minutes, and may require more than 30 MB of space on the hard drive, depending on the options -selected in the Doxygen config file, util/doxygen/Doxyfile.LinuxBIOS. +selected in the Doxygen config file, util/doxygen/Doxyfile.coreboot. Required software: @@ -57,7 +57,7 @@ Third-party Code and License Overview Current version we use: 15508d22d00277a1f2a1022dce38f2772c810d32 (02/2006) * util/lar/*: GPLv2 - Independant project, but written specifically for LinuxBIOS. + Independant project, but written specifically for coreboot. * include/lar.h, util/lar/lar.h, util/lar/example.c: Dual-licensed (GPLv2 + revised BSD license) diff --git a/Kconfig b/Kconfig index df8f59ca56..f55ffd99e7 100644 --- a/Kconfig +++ b/Kconfig @@ -1,5 +1,5 @@ ## -## This file is part of the LinuxBIOS project. +## This file is part of the coreboot project. ## ## Copyright (C) 2006 Ronald G. Minnich ## Copyright (C) 2006 Segher Boessenkool @@ -26,7 +26,7 @@ # see http://lxr.linux.no/source/Documentation/kbuild/kconfig-language.txt. # -mainmenu "LinuxBIOS Configuration" +mainmenu "coreboot configuration" menu "General setup" @@ -43,22 +43,22 @@ config EXPERT bool "Expert mode" help This allows you to select certain advanced configuration options. - It is mainly intended for LinuxBIOS developers. + It is mainly intended for coreboot developers. Warning: Only enable this option if you really know what you're doing! You have been warned! config LOCALVERSION - string "Local version - append to LinuxBIOS release" + string "Local version - append to coreboot release" help - Append an extra string to the end of the LinuxBIOS version. + Append an extra string to the end of the coreboot version. config BEEPS - bool "Enable beeps upon certain LinuxBIOS events" + bool "Enable beeps upon certain coreboot events" depends EXPERT default n help - Enable this option to make LinuxBIOS beep upon certain events. + Enable this option to make coreboot beep upon certain events. endmenu @@ -101,7 +101,7 @@ config PAYLOAD_PREPARSE_ELF depends EXPERT default n help - Until now, LinuxBIOS has used ELF for the payload. There are many + Until now, coreboot has used ELF for the payload. There are many problems with this, not least being the inefficiency -- the ELF has to be decompressed to memory and then the segments have to be copied. Plus, lar can't see the segments in the ELF -- to see all @@ -113,17 +113,17 @@ config PAYLOAD_PREPARSE_ELF flashed the FLASH and rebooted the machine. Boot time is really not the time you want to find out your ELF payload is broken. - With this option, LinuxBIOS will direct lar to break each ELF + With this option, coreboot will direct lar to break each ELF segment into a LAR entry. ELF will not be used at all. Note that - (for now) LinuxBIOS is backward compatible -- if you put an ELF - payload in, LinuxBIOS can still parse it. We hope to remove ELF + (for now) coreboot is backward compatible -- if you put an ELF + payload in, coreboot can still parse it. We hope to remove ELF entirely in the future. config PAYLOAD_ELF bool "An ELF executable payload file" help Select this option if you have a payload image (an ELF file) - which LinuxBIOS should run as soon as the basic hardware + which coreboot should run as soon as the basic hardware initialization is completed. You will be able to specify the location and file name of the @@ -132,8 +132,8 @@ config PAYLOAD_ELF config PAYLOAD_NONE bool "No payload" help - Select this option if you want to create an "empty" LinuxBIOS - ROM image for a certain mainboard, i.e. a LinuxBIOS ROM image + Select this option if you want to create an "empty" coreboot + ROM image for a certain mainboard, i.e. a coreboot ROM image which does not yet contain a payload. For such an image to be useful, you have to use the 'lar' tool diff --git a/Makefile b/Makefile index 3d36516887..4230381b09 100644 --- a/Makefile +++ b/Makefile @@ -1,7 +1,7 @@ ## -## This file is part of the LinuxBIOS project. +## This file is part of the coreboot project. ## -## LinuxBIOS build system Lbuild +## coreboot build system Lbuild ## ## Copyright (C) 2007 coresystems GmbH ## (Written by Stefan Reinauer for coresystems GmbH) @@ -72,16 +72,16 @@ else include $(src)/.config ifneq ($(CONFIG_LOCALVERSION),"") -LINUXBIOS_EXTRA_VERSION := -$(shell echo $(CONFIG_LOCALVERSION)) +COREBOOT_EXTRA_VERSION := -$(shell echo $(CONFIG_LOCALVERSION)) endif -all: prepare prepare2 $(obj)/linuxbios.rom +all: prepare prepare2 $(obj)/coreboot.rom $(Q)printf " DONE\n" ARCH:=$(shell echo $(CONFIG_ARCH)) MAINBOARDDIR=$(shell echo $(CONFIG_MAINBOARD_NAME)) -LINUXBIOSINCLUDE := -I$(src) -Iinclude \ +COREBOOTINCLUDE := -I$(src) -Iinclude \ -I$(src)/include \ -I$(src)/include/arch/$(ARCH)/ \ -include $(obj)/config.h \ @@ -96,8 +96,8 @@ AR := $(AR_$(ARCH)) CFLAGS += $(CFLAGS_$(ARCH)) -CPPFLAGS := $(LINUXBIOSINCLUDE) -CFLAGS += $(LINUXBIOSINCLUDE) +CPPFLAGS := $(COREBOOTINCLUDE) +CFLAGS += $(COREBOOTINCLUDE) # Note: This _must_ come after 'CC' is set for the second time in this # Makefile (see above), otherwise the build would break if 'gcc' isn't @@ -122,7 +122,7 @@ doc: doxy: doxygen doxygen: - $(Q)$(DOXYGEN) util/doxygen/Doxyfile.LinuxBIOS + $(Q)$(DOXYGEN) util/doxygen/Doxyfile.coreboot prepare: $(Q)mkdir -p $(obj) @@ -133,17 +133,17 @@ prepare2: $(Q)printf " CP $(subst $(shell pwd)/,,$(obj)/config.h)\n" $(Q)cp $(src)/.tmpconfig.h $(obj)/config.h $(Q)printf " GEN $(subst $(shell pwd)/,,$(obj)/build.h)\n" - $(Q)printf "#define LINUXBIOS_VERSION \"$(KERNELVERSION)\"\n" > $(obj)/build.h - $(Q)printf "#define LINUXBIOS_EXTRA_VERSION \"$(LINUXBIOS_EXTRA_VERSION)\"\n" >> $(obj)/build.h - $(Q)printf "#define LINUXBIOS_BUILD \"`LANG= date`\"\n" >> $(obj)/build.h + $(Q)printf "#define COREBOOT_VERSION \"$(KERNELVERSION)\"\n" > $(obj)/build.h + $(Q)printf "#define COREBOOT_EXTRA_VERSION \"$(COREBOOT_EXTRA_VERSION)\"\n" >> $(obj)/build.h + $(Q)printf "#define COREBOOT_BUILD \"`LANG= date`\"\n" >> $(obj)/build.h $(Q)printf "\n" >> $(obj)/build.h - $(Q)printf "#define LINUXBIOS_COMPILER \"$(shell LANG= $(CC) --version | head -n1)\"\n" >> $(obj)/build.h - $(Q)printf "#define LINUXBIOS_ASSEMBLER \"$(shell LANG= $(AS) --version | head -n1)\"\n" >> $(obj)/build.h - $(Q)printf "#define LINUXBIOS_LINKER \"$(shell LANG= $(LD) --version | head -n1)\"\n" >> $(obj)/build.h - $(Q)printf "#define LINUXBIOS_COMPILE_TIME \"`LANG= date +%T`\"\n" >> $(obj)/build.h - $(Q)printf "#define LINUXBIOS_COMPILE_BY \"$(shell PATH=$$PATH:/usr/ucb whoami)\"\n" >> $(obj)/build.h - $(Q)printf "#define LINUXBIOS_COMPILE_HOST \"$(shell hostname)\"\n" >> $(obj)/build.h - $(Q)printf "#define LINUXBIOS_COMPILE_DOMAIN \"$(shell test `uname -s` = "Linux" && dnsdomainname || domainname)\"\n" >> $(obj)/build.h + $(Q)printf "#define COREBOOT_COMPILER \"$(shell LANG= $(CC) --version | head -n1)\"\n" >> $(obj)/build.h + $(Q)printf "#define COREBOOT_ASSEMBLER \"$(shell LANG= $(AS) --version | head -n1)\"\n" >> $(obj)/build.h + $(Q)printf "#define COREBOOT_LINKER \"$(shell LANG= $(LD) --version | head -n1)\"\n" >> $(obj)/build.h + $(Q)printf "#define COREBOOT_COMPILE_TIME \"`LANG= date +%T`\"\n" >> $(obj)/build.h + $(Q)printf "#define COREBOOT_COMPILE_BY \"$(shell PATH=$$PATH:/usr/ucb whoami)\"\n" >> $(obj)/build.h + $(Q)printf "#define COREBOOT_COMPILE_HOST \"$(shell hostname)\"\n" >> $(obj)/build.h + $(Q)printf "#define COREBOOT_COMPILE_DOMAIN \"$(shell test `uname -s` = "Linux" && dnsdomainname || domainname)\"\n" >> $(obj)/build.h clean: $(Q)printf " CLEAN $(subst $(shell pwd)/,,$(obj))\n" diff --git a/README b/README index 997b14b3f3..e5870edeb0 100644 --- a/README +++ b/README @@ -1,8 +1,8 @@ ------------------------------------------------------------------------------- -LinuxBIOS README +coreboot README ------------------------------------------------------------------------------- -LinuxBIOS is a Free Software project aimed at replacing the proprietary +Coreboot is a Free Software project aimed at replacing the proprietary BIOS you can find in most of today's computers. It performs just a little bit of hardware initialization and then executes @@ -13,7 +13,7 @@ Payloads -------- After the basic initialization of the hardware has been performed, any -desired "payload" can be started by LinuxBIOS. Examples include: +desired "payload" can be started by coreboot. Examples include: * A Linux kernel * FILO (a simple bootloader with filesystem support) @@ -31,12 +31,12 @@ desired "payload" can be started by LinuxBIOS. Examples include: Supported Hardware ------------------ -LinuxBIOS supports a wide range of chipsets, devices, and mainboards. +Coreboot supports a wide range of chipsets, devices, and mainboards. For details please consult: - * http://www.linuxbios.org/Supported_Motherboards - * http://www.linuxbios.org/Supported_Chipsets_and_Devices + * http://www.coreboot.org/Supported_Motherboards + * http://www.coreboot.org/Supported_Chipsets_and_Devices Build Requirements @@ -57,7 +57,7 @@ Optional (for generating/viewing documentation): Building And Installing ----------------------- -Note: Currently only the x86 QEMU target is supported in LinuxBIOSv3. +Note: Currently only the x86 QEMU target is supported in coreboot-v3. 1) Build a payload: @@ -70,29 +70,29 @@ Note: Currently only the x86 QEMU target is supported in LinuxBIOSv3. variety of payloads. The result of this step is usually a file called 'payload.elf' in the top-level directory. -2) Configure LinuxBIOS: +2) Configure coreboot: $ make menuconfig Select at least the desired mainboard vendor, the mainboard device, and - the size of your ROM chip. Per default LinuxBIOS will look for a file + the size of your ROM chip. Per default coreboot will look for a file called 'payload.elf' in the current directory and use that as the payload. If that's not what you want, you can change the path/filename of the payload to use some other payload file. Or you can choose 'No payload' - in the configuration menu, in which case the resulting LinuxBIOS ROM image + in the configuration menu, in which case the resulting coreboot ROM image will not contain any payload. You'll have to manually add a payload - later using the 'lar' utility for the LinuxBIOS ROM image to be useful. + later using the 'lar' utility for the coreboot ROM image to be useful. -3) Build the LinuxBIOS ROM image: +3) Build the coreboot ROM image: $ make - The generated ROM image is the file linuxbios.rom in the build/ directory. + The generated ROM image is the file coreboot.rom in the build/ directory. -4) Flash the LinuxBIOS ROM image on a BIOS chip: +4) Flash the coreboot ROM image on a BIOS chip: - $ flashrom -wv linuxbios.rom + $ flashrom -wv coreboot.rom NOTE: This step will OVERWRITE the current BIOS located on the ROM chip! Make sure you have adequate backup facilities before performing this @@ -106,12 +106,12 @@ Note: Currently only the x86 QEMU target is supported in LinuxBIOSv3. the flashrom package via 'apt-get install flashrom'. -Testing LinuxBIOS Without Modifying Your Hardware +Testing coreboot Without Modifying Your Hardware ------------------------------------------------- -If you want to test LinuxBIOS without any risks before you really decide +If you want to test coreboot without any risks before you really decide to use it on your hardware, you can use the QEMU system emulator to run -LinuxBIOS virtually in QEMU. +coreboot virtually in QEMU. The required steps are: @@ -124,14 +124,14 @@ The required steps are: $ qemu -L build -hda /dev/zero -serial stdio - This will run LinuxBIOS in QEMU and output all debugging messages (which + This will run coreboot in QEMU and output all debugging messages (which are usually emitted to a serial console) on stdout. It will not do anything useful beyond that, as you provided no virtual harddrive to QEMU (-hda /dev/zero). If you have a full QEMU hard drive image (say /tmp/qemu.img) with a Linux distribution installed, you can boot that Linux kernel by using a proper - FILO payload with LinuxBIOS and typing: + FILO payload with coreboot and typing: $ qemu -L build -hda /tmp/qemu.img -serial stdio @@ -143,26 +143,26 @@ Website and Mailing List ------------------------ Further details on the project, a FAQ, many HOWTOs, news, development -guidelines and more can be found on the LinuxBIOS website: +guidelines and more can be found on the coreboot website: - http://www.linuxbios.org + http://www.coreboot.org -You can contact us directly on the LinuxBIOS mailing list: +You can contact us directly on the coreboot mailing list: - http://www.linuxbios.org/Mailinglist + http://www.coreboot.org/Mailinglist Copyright and License --------------------- -The copyright on LinuxBIOS is owned by quite a large number of individual +The copyright on coreboot is owned by quite a large number of individual developers and companies. Please check the individual source files for details. -LinuxBIOS is licensed under the terms of the GNU General Public License (GPL). +Coreboot is licensed under the terms of the GNU General Public License (GPL). Some files are licensed under the "GPL (version 2, or any later version)", and some files are licensed under the "GPL, version 2". For some parts, which were derived from other Free Software projects, other (GPL-compatible) licenses may apply. Please check the individual source files for details. -This makes the resulting LinuxBIOS images licensed under the GPL, version 2. +This makes the resulting coreboot images licensed under the GPL, version 2. diff --git a/Rules.make b/Rules.make index 79744cb4b9..615c380f6f 100644 --- a/Rules.make +++ b/Rules.make @@ -1,5 +1,5 @@ ## -## This file is part of the LinuxBIOS project. +## This file is part of the coreboot project. ## ## Copyright (C) 2006-2007 coresystems GmbH ## (Written by Stefan Reinauer for coresystems GmbH) @@ -25,7 +25,7 @@ $(obj)/mainboard/$(MAINBOARDDIR)/statictree.o: $(obj)/mainboard/$(MAINBOARDDIR)/statictree.c $(obj)/statictree.h $(Q)printf " CC $(subst $(shell pwd)/,,$(@))\n" - $(Q)$(CC) $(INITCFLAGS) $(LINUXBIOSINCLUDE) -c -o $@ $< + $(Q)$(CC) $(INITCFLAGS) $(COREBOOTINCLUDE) -c -o $@ $< $(obj)/mainboard/$(MAINBOARDDIR)/statictree.c: $(src)/mainboard/$(MAINBOARDDIR)/dts $(obj)/util/dtc/dtc $(Q)printf " DTC $(subst $(shell pwd)/,,$(@))\n" diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig index e96cf49b1c..9895b5f79c 100644 --- a/arch/x86/Kconfig +++ b/arch/x86/Kconfig @@ -1,5 +1,5 @@ ## -## This file is part of the LinuxBIOS project. +## This file is part of the coreboot project. ## ## Copyright (C) 2006-2007 coresystems GmbH ## (Written by Stefan Reinauer for coresystems GmbH) @@ -59,7 +59,7 @@ config SMP boolean help This option is used to enable certain functions to make - LinuxBIOS work correctly on symmetric multi processor + coreboot work correctly on symmetric multi processor systems. It is usually set in mainboard/*/Kconfig. diff --git a/arch/x86/Makefile b/arch/x86/Makefile index f93c36bb0e..dd05e1b3e7 100644 --- a/arch/x86/Makefile +++ b/arch/x86/Makefile @@ -1,5 +1,5 @@ ## -## This file is part of the LinuxBIOS project. +## This file is part of the coreboot project. ## ## Copyright (C) 2006-2007 coresystems GmbH ## (Written by Stefan Reinauer for coresystems GmbH) @@ -29,12 +29,12 @@ SILENT := >/dev/null 2>&1 # # Build the ROM Image / LAR archive # -# LinuxBIOS v3 is completely modular. One module, the bootblock (stage0), +# coreboot v3 is completely modular. One module, the bootblock (stage0), # is mandatory. All modules are packed together in a LAR archive. # The LAR archive may contain any number of stages, payloads and option ROMs. # -ROM_SIZE := $(shell expr $(CONFIG_LINUXBIOS_ROMSIZE_KB) \* 1024) +ROM_SIZE := $(shell expr $(CONFIG_COREBOOT_ROMSIZE_KB) \* 1024) LARFILES := nocompress:normal/initram normal/stage2 nocompress:normal/option_table ifneq ($(CONFIG_PAYLOAD_NONE),y) @@ -57,12 +57,12 @@ ifeq ($(CONFIG_DEFAULT_COMPRESSION_NRV2B),y) COMPRESSFLAG := -C nrv2b endif -$(obj)/linuxbios.rom $(obj)/linuxbios.map: $(obj)/linuxbios.bootblock $(obj)/util/lar/lar lzma nrv2b $(obj)/linuxbios.initram $(obj)/linuxbios.stage2 $(obj)/option_table +$(obj)/coreboot.rom $(obj)/coreboot.map: $(obj)/coreboot.bootblock $(obj)/util/lar/lar lzma nrv2b $(obj)/coreboot.initram $(obj)/coreboot.stage2 $(obj)/option_table $(Q)rm -rf $(obj)/lar.tmp $(Q)mkdir $(obj)/lar.tmp $(Q)mkdir $(obj)/lar.tmp/normal - $(Q)cp $(obj)/linuxbios.initram $(obj)/lar.tmp/normal/initram - $(Q)cp $(obj)/linuxbios.stage2 $(obj)/lar.tmp/normal/stage2 + $(Q)cp $(obj)/coreboot.initram $(obj)/lar.tmp/normal/initram + $(Q)cp $(obj)/coreboot.stage2 $(obj)/lar.tmp/normal/stage2 $(Q)cp $(obj)/option_table $(obj)/lar.tmp/normal/option_table ifeq ($(CONFIG_PAYLOAD_NONE),y) $(Q)printf " PAYLOAD none (as specified by user)\n" @@ -77,31 +77,31 @@ else fi endif $(Q)printf " LAR $(subst $(shell pwd)/,,$(@))\n" - $(Q)rm -f $(obj)/linuxbios.rom + $(Q)rm -f $(obj)/coreboot.rom $(Q)cd $(obj)/lar.tmp && ../util/lar/lar $(PARSEELF) $(COMPRESSFLAG) -c \ - ../linuxbios.rom \ + ../coreboot.rom \ $(LARFILES) \ - -s $(ROM_SIZE) -b $(obj)/linuxbios.bootblock + -s $(ROM_SIZE) -b $(obj)/coreboot.bootblock $(Q)# QEMU wants bios.bin: $(Q)# Run "qemu -L build/ -serial stdio -hda /dev/zero". $(Q)printf " CP $(subst $(shell pwd)/,,$(obj)/bios.bin)\n" $(Q)cp $@ $(obj)/bios.bin - $(Q)echo "LinuxBIOS ROM Image:" > $(obj)/linuxbios.map - $(Q)$(obj)/util/lar/lar -l $(obj)/linuxbios.rom >> $(obj)/linuxbios.map - $(Q)(echo; echo "Stage 0/1 Map:") >> $(obj)/linuxbios.map - $(Q)cat $(obj)/stage0.init.map >> $(obj)/linuxbios.map - $(Q)(echo; echo "Stage Initram Map:") >> $(obj)/linuxbios.map - $(Q)cat $(obj)/linuxbios.initram.map >> $(obj)/linuxbios.map - $(Q)(echo; echo "Stage 2 Map:") >> $(obj)/linuxbios.map - $(Q)cat $(obj)/linuxbios.stage2.map >> $(obj)/linuxbios.map + $(Q)echo "Coreboot ROM Image:" > $(obj)/coreboot.map + $(Q)$(obj)/util/lar/lar -l $(obj)/coreboot.rom >> $(obj)/coreboot.map + $(Q)(echo; echo "Stage 0/1 Map:") >> $(obj)/coreboot.map + $(Q)cat $(obj)/stage0.init.map >> $(obj)/coreboot.map + $(Q)(echo; echo "Stage Initram Map:") >> $(obj)/coreboot.map + $(Q)cat $(obj)/coreboot.initram.map >> $(obj)/coreboot.map + $(Q)(echo; echo "Stage 2 Map:") >> $(obj)/coreboot.map + $(Q)cat $(obj)/coreboot.stage2.map >> $(obj)/coreboot.map -$(obj)/linuxbios.bootblock: $(obj)/linuxbios.vpd $(obj)/stage0.init +$(obj)/coreboot.bootblock: $(obj)/coreboot.vpd $(obj)/stage0.init $(Q)printf " BUILD $(subst $(shell pwd)/,,$(@))\n" $(Q)cat $^ > $@ # -# LinuxBIOS stage0. This is the LinuxBIOS "boot block code". +# Coreboot stage0. This is the coreboot "boot block code". # It enables Cache-as-RAM and parses the LAR archive for an # initram module and the various stages and payload files. # @@ -164,7 +164,7 @@ $(obj)/stage0.o $(obj)/stage0.init $(obj)/stage0-prefixed.o: $(STAGE0_OBJ) # -# This is the rest of LinuxBIOS (v2: linuxbios_ram.rom). +# This is the rest of coreboot (v2: coreboot_ram.rom). # Is this maybe platform independent, except for the "drivers"? # Where should it be built, maybe in device/? # @@ -174,7 +174,7 @@ $(obj)/stage0.o $(obj)/stage0.init $(obj)/stage0-prefixed.o: $(STAGE0_OBJ) STAGE2_LIB_OBJ = stage2.o clog2.o mem.o tables.o delay.o \ compute_ip_checksum.o string.o -STAGE2_ARCH_X86_OBJ = archtables.o linuxbios_table.o udelay_io.o +STAGE2_ARCH_X86_OBJ = archtables.o coreboot_table.o udelay_io.o STAGE2_ARCH_X86_OBJ += pci_ops_auto.o pci_ops_conf1.o pci_ops_conf2.o STAGE2_ARCH_X86_OBJ += keyboard.o i8259.o isa-dma.o @@ -203,12 +203,12 @@ endif STAGE2_OBJ_NEEDED = $(filter-out $(STAGE0_OBJ), $(STAGE2_OBJ)) -$(obj)/linuxbios.stage2 $(obj)/linuxbios.stage2.map: $(obj)/stage0.init $(STAGE2_OBJ_NEEDED) +$(obj)/coreboot.stage2 $(obj)/coreboot.stage2.map: $(obj)/stage0.init $(STAGE2_OBJ_NEEDED) $(Q)# leave a .o with full symbols in it for debugging. $(Q)printf " LD $(subst $(shell pwd)/,,$(@))\n" $(Q)$(LD) -R $(obj)/stage0.o -Ttext 0x1000 --entry=stage2 \ - -o $(obj)/linuxbios.stage2 $(STAGE2_OBJ_NEEDED) - $(Q)$(NM) $(obj)/linuxbios.stage2 | sort -u > $(obj)/linuxbios.stage2.map + -o $(obj)/coreboot.stage2 $(STAGE2_OBJ_NEEDED) + $(Q)$(NM) $(obj)/coreboot.stage2 | sort -u > $(obj)/coreboot.stage2.map # # Build rules. @@ -222,7 +222,7 @@ $(obj)/arch/x86/%.o: $(src)/arch/x86/%.c # Building asm stub. $(obj)/arch/x86/stage0%.o: $(src)/arch/x86/stage0%.S $(Q)printf " CC $(subst $(shell pwd)/,,$(@))\n" - $(Q)$(CC) -E $(LINUXBIOSINCLUDE) $< \ + $(Q)$(CC) -E $(COREBOOTINCLUDE) $< \ -o $(obj)/arch/x86/stage0_asm.s -DBOOTBLK=0x1f00 \ -DRESRVED=0xf0 -DDATE=\"`date +%Y/%m/%d`\" $(Q)printf " AS $(subst $(shell pwd)/,,$(@))\n" @@ -231,20 +231,20 @@ $(obj)/arch/x86/stage0%.o: $(src)/arch/x86/stage0%.S $(obj)/arch/x86/geodelx/stage0.o: $(src)/arch/x86/geodelx/stage0.S $(Q)mkdir -p $(dir $@) $(Q)printf " CC $(subst $(shell pwd)/,,$(@))\n" - $(Q)$(CC) -E $(LINUXBIOSINCLUDE) $< \ + $(Q)$(CC) -E $(COREBOOTINCLUDE) $< \ -o $(obj)/arch/x86/stage0_asm.s -DBOOTBLK=0x1f00 \ -DRESRVED=0xf0 -DDATE=\"`date +%Y/%m/%d`\" $(Q)printf " AS $(subst $(shell pwd)/,,$(@))\n" $(Q)$(AS) $(obj)/arch/x86/stage0_asm.s -o $@ -$(obj)/linuxbios.initram $(obj)/linuxbios.initram.map: $(obj)/stage0.init $(obj)/stage0-prefixed.o $(INITRAM_OBJ) +$(obj)/coreboot.initram $(obj)/coreboot.initram.map: $(obj)/stage0.init $(obj)/stage0-prefixed.o $(INITRAM_OBJ) $(Q)printf " CC $(subst $(shell pwd)/,,$(@)) (XIP)\n" - $(Q)$(CC) $(INITCFLAGS) -D_SHARED -fPIE -c -combine $(INITRAM_OBJ) -o $(obj)/linuxbios.initram_partiallylinked.o + $(Q)$(CC) $(INITCFLAGS) -D_SHARED -fPIE -c -combine $(INITRAM_OBJ) -o $(obj)/coreboot.initram_partiallylinked.o $(Q)# initram links against stage0 $(Q)printf " LD $(subst $(shell pwd)/,,$(@))\n" $(Q)$(LD) -Ttext 0 --entry main -N -R $(obj)/stage0-prefixed.o \ - $(obj)/linuxbios.initram_partiallylinked.o -o $(obj)/linuxbios.initram + $(obj)/coreboot.initram_partiallylinked.o -o $(obj)/coreboot.initram $(Q)printf " NM $(subst $(shell pwd)/,,$(@))\n" - $(Q)$(NM) $(obj)/linuxbios.initram | sort -u > $(obj)/linuxbios.initram.map + $(Q)$(NM) $(obj)/coreboot.initram | sort -u > $(obj)/coreboot.initram.map endif diff --git a/arch/x86/archtables.c b/arch/x86/archtables.c index 80cbd8539e..844fe5c849 100644 --- a/arch/x86/archtables.c +++ b/arch/x86/archtables.c @@ -1,6 +1,5 @@ /* - * table management code for Linux BIOS - * + * table management code for coreboot * * Copyright (C) 2002 Eric Biederman, Linux NetworX * @@ -45,7 +44,7 @@ struct gdtarg { #if 0 // Copy GDT to new location and reload it // 2003-07 by SONE Takeshi -// Ported from Etherboot to LinuxBIOS 2005-08 by Steve Magnani +// Ported from Etherboot to coreboot 2005-08 by Steve Magnani void move_gdt(unsigned long newgdt) { u16 num_gdt_bytes = &gdt_end - &gdt; @@ -85,7 +84,7 @@ struct lb_memory *arch_write_tables(void) /* Write ACPI tables */ /* write them in the rom area because DSDT can be large (8K on epia-m) which - * pushes linuxbios table out of first 4K if set up in low table area + * pushes coreboot table out of first 4K if set up in low table area */ // rom_table_end = write_acpi_tables(rom_table_end); @@ -136,8 +135,8 @@ struct lb_memory *arch_write_tables(void) move_gdt(low_table_end); low_table_end += &gdt_end - &gdt; #endif - /* The linuxbios table must be in 0-4K or 960K-1M */ - write_linuxbios_table( + /* The coreboot table must be in 0-4K or 960K-1M */ + write_coreboot_table( low_table_start, low_table_end, rom_table_start, rom_table_end); diff --git a/arch/x86/geodelx/cpu.c b/arch/x86/geodelx/cpu.c index 0753fd353f..225aa9e386 100644 --- a/arch/x86/geodelx/cpu.c +++ b/arch/x86/geodelx/cpu.c @@ -1,5 +1,5 @@ /* - * This file is part of the LinuxBIOS project. + * This file is part of the coreboot project. * * Copyright (C) 2006 Indrek Kruusa * Copyright (C) 2006 Ronald G. Minnich diff --git a/arch/x86/geodelx/geodelx.c b/arch/x86/geodelx/geodelx.c index 37363d5074..99a8f59b43 100644 --- a/arch/x86/geodelx/geodelx.c +++ b/arch/x86/geodelx/geodelx.c @@ -1,5 +1,5 @@ /* - * This file is part of the LinuxBIOS project. + * This file is part of the coreboot project. * * Copyright (C) 2006 Indrek Kruusa * Copyright (C) 2006 Ronald G. Minnich diff --git a/arch/x86/geodelx/stage0.S b/arch/x86/geodelx/stage0.S index 6b3f2c664a..0301b7ad17 100644 --- a/arch/x86/geodelx/stage0.S +++ b/arch/x86/geodelx/stage0.S @@ -1,5 +1,5 @@ /* - * This file is part of the LinuxBIOS project. + * This file is part of the coreboot project. * * Copyright (C) 2000,2007 Ronald G. Minnich * Copyright (C) 2005 Eswar Nallusamy, LANL @@ -170,7 +170,7 @@ __protected_stage0: .align 4 /* Here begins CAR support. */ - /* This particular code is straight from LinuxBIOS v2. */ + /* This particular code is straight from coreboot v2. */ /* DCacheSetup: Setup data cache for use as RAM for a stack. */ DCacheSetup: diff --git a/arch/x86/geodelx/stage1.c b/arch/x86/geodelx/stage1.c index d3130b47e7..f4c6ae6448 100644 --- a/arch/x86/geodelx/stage1.c +++ b/arch/x86/geodelx/stage1.c @@ -1,5 +1,5 @@ /* - * This file is part of the LinuxBIOS project. + * This file is part of the coreboot project. * * Copyright (C) 2007 Advanced Micro Devices, Inc. * diff --git a/arch/x86/i8259.c b/arch/x86/i8259.c index e58a5f7be8..bf27e85cd4 100644 --- a/arch/x86/i8259.c +++ b/arch/x86/i8259.c @@ -1,5 +1,5 @@ /* - * This file is part of the LinuxBIOS project. + * This file is part of the coreboot project. * * It is based on the arch/i386/boot/setup.S file from the Linux kernel. */ diff --git a/arch/x86/ldscript.ld b/arch/x86/ldscript.ld index 31a7d303e3..3d7a5c88fc 100644 --- a/arch/x86/ldscript.ld +++ b/arch/x86/ldscript.ld @@ -1,5 +1,5 @@ /* - * This file is part of the LinuxBIOS project. + * This file is part of the coreboot project. * * Copyright (C) 2007 Ron G. Minnich * diff --git a/arch/x86/linuxbios_table.c b/arch/x86/linuxbios_table.c index 72115ef453..c39367fb91 100644 --- a/arch/x86/linuxbios_table.c +++ b/arch/x86/linuxbios_table.c @@ -1,5 +1,5 @@ /* - * table management code for Linux BIOS tables + * table management code for coreboot tables * * Copyright (C) 2002 Eric Biederman, Linux NetworX * Copyright (C) 2007 coresystems GmbH @@ -133,9 +133,9 @@ struct cmos_checksum *lb_cmos_checksum(struct lb_header *header) cmos_checksum->size = (sizeof(*cmos_checksum)); - cmos_checksum->range_start = LB_CKS_RANGE_START * 8; - cmos_checksum->range_end = ( LB_CKS_RANGE_END * 8 ) + 7; - cmos_checksum->location = LB_CKS_LOC * 8; + cmos_checksum->range_start = CB_CKS_RANGE_START * 8; + cmos_checksum->range_end = ( CB_CKS_RANGE_END * 8 ) + 7; + cmos_checksum->location = CB_CKS_LOC * 8; cmos_checksum->type = CHECKSUM_PCBIOS; @@ -148,16 +148,16 @@ void lb_strings(struct lb_header *header) u32 tag; const u8 *string; } strings[] = { - { LB_TAG_VERSION, (const u8 *)LINUXBIOS_VERSION }, - { LB_TAG_EXTRA_VERSION, (const u8 *)LINUXBIOS_EXTRA_VERSION }, - { LB_TAG_BUILD, (const u8 *)LINUXBIOS_BUILD }, - { LB_TAG_COMPILE_TIME, (const u8 *)LINUXBIOS_COMPILE_TIME }, // duplicate? - { LB_TAG_COMPILE_BY, (const u8 *)LINUXBIOS_COMPILE_BY }, - { LB_TAG_COMPILE_HOST, (const u8 *)LINUXBIOS_COMPILE_HOST }, - { LB_TAG_COMPILE_DOMAIN, (const u8 *)LINUXBIOS_COMPILE_DOMAIN }, - { LB_TAG_COMPILER, (const u8 *)LINUXBIOS_COMPILER }, - { LB_TAG_LINKER, (const u8 *)LINUXBIOS_LINKER }, - { LB_TAG_ASSEMBLER, (const u8 *)LINUXBIOS_ASSEMBLER }, + { LB_TAG_VERSION, (const u8 *)COREBOOT_VERSION }, + { LB_TAG_EXTRA_VERSION, (const u8 *)COREBOOT_EXTRA_VERSION }, + { LB_TAG_BUILD, (const u8 *)COREBOOT_BUILD }, + { LB_TAG_COMPILE_TIME, (const u8 *)COREBOOT_COMPILE_TIME }, // duplicate? + { LB_TAG_COMPILE_BY, (const u8 *)COREBOOT_COMPILE_BY }, + { LB_TAG_COMPILE_HOST, (const u8 *)COREBOOT_COMPILE_HOST }, + { LB_TAG_COMPILE_DOMAIN, (const u8 *)COREBOOT_COMPILE_DOMAIN }, + { LB_TAG_COMPILER, (const u8 *)COREBOOT_COMPILER }, + { LB_TAG_LINKER, (const u8 *)COREBOOT_LINKER }, + { LB_TAG_ASSEMBLER, (const u8 *)COREBOOT_ASSEMBLER }, }; unsigned int i; for(i = 0; i < ARRAY_SIZE(strings); i++) { @@ -231,7 +231,7 @@ unsigned long lb_table_fini(struct lb_header *head) head->table_checksum = compute_ip_checksum(first_rec, head->table_bytes); head->header_checksum = 0; head->header_checksum = compute_ip_checksum(head, sizeof(*head)); - printk(BIOS_DEBUG,"Wrote LinuxBIOS table at: %p - %p checksum %x\n", + printk(BIOS_DEBUG,"Wrote coreboot table at: %p - %p checksum %x\n", head, rec, head->table_checksum); return (unsigned long)rec; } @@ -352,8 +352,8 @@ static void lb_add_memory_range(struct lb_memory *mem, lb_cleanup_memory_ranges(mem); } -/* Routines to extract part so the linuxBIOS table or - * information from the linuxBIOS table after we have written it. +/* Routines to extract part so the coreboot table or + * information from the coreboot table after we have written it. * Currently get_lb_mem relies on a global we can change the * implementaiton. */ @@ -386,7 +386,7 @@ static struct lb_memory *build_lb_mem(struct lb_header *head) } /** - * Add pointer to device tree to LinuxBIOS table. + * Add pointer to device tree to coreboot table. * * @param head Pointer to lbtable header. * @return TODO @@ -405,7 +405,7 @@ struct lb_devtree *lb_devtree(struct lb_header *head) return lbdev; } -unsigned long write_linuxbios_table( +unsigned long write_coreboot_table( unsigned long low_table_start, unsigned long low_table_end, unsigned long rom_table_start, unsigned long rom_table_end) { @@ -429,7 +429,7 @@ unsigned long write_linuxbios_table( rec_dest = lb_new_record(head); memcpy(rec_dest, rec_src, rec_src->size); - /* Create cmos checksum entry in linuxbios table */ + /* Create cmos checksum entry in coreboot table */ lb_cmos_checksum(head); } @@ -446,9 +446,9 @@ unsigned long write_linuxbios_table( /* Note: * I assume that there is always memory at immediately after - * the low_table_end. This means that after I setup the linuxbios table. + * the low_table_end. This means that after I setup the coreboot table. * I can trivially fixup the reserved memory ranges to hold the correct - * size of the linuxbios table. + * size of the coreboot table. */ /* Record our motherboard */ @@ -457,7 +457,7 @@ unsigned long write_linuxbios_table( /* Record our various random string information */ lb_strings(head); - /* Record a pointer to the LinuxBIOS device tree */ + /* Record a pointer to the coreboot device tree */ lb_devtree(head); /* Remember where my valid memory ranges are */ diff --git a/arch/x86/macros.h b/arch/x86/macros.h index 8c12c1c805..8156bd1e5e 100644 --- a/arch/x86/macros.h +++ b/arch/x86/macros.h @@ -1,5 +1,5 @@ /* - * This file is part of the LinuxBIOS project. + * This file is part of the coreboot project. * * Copyright (C) 2000 Ron G. Minnich * Copyright (C) 2007 Stefan Reinauer diff --git a/arch/x86/mc146818rtc.c b/arch/x86/mc146818rtc.c index 30a935fbf8..3ca57ea557 100644 --- a/arch/x86/mc146818rtc.c +++ b/arch/x86/mc146818rtc.c @@ -128,11 +128,11 @@ void rtc_init(int invalid) CMOS_WRITE(RTC_FREQ_SELECT_DEFAULT, RTC_FREQ_SELECT); #if defined(CONFIG_OPTION_TABLE) && (CONFIG_OPTION_TABLE == 1) - /* See if there is a LB CMOS checksum error */ - checksum_invalid = !rtc_checksum_valid(LB_CKS_RANGE_START, - LB_CKS_RANGE_END,LB_CKS_LOC); + /* See if there is a coreboot CMOS checksum error */ + checksum_invalid = !rtc_checksum_valid(CB_CKS_RANGE_START, + CB_CKS_RANGE_END,CB_CKS_LOC); if(checksum_invalid) - printk(BIOS_WARNING, "Invalid LinuxBIOS CMOS checksum.\n"); + printk(BIOS_WARNING, "Invalid coreboot CMOS checksum.\n"); /* Make certain we have a valid checksum */ rtc_set_checksum(PC_CKS_RANGE_START, @@ -184,8 +184,8 @@ struct cmos_option_table *get_option_table(void) int ret; // FIXME - i want to be dynamic. - archive.len=(CONFIG_LINUXBIOS_ROMSIZE_KB-16)*1024; - archive.start=(void *)(0UL-(CONFIG_LINUXBIOS_ROMSIZE_KB*1024)); + archive.len=(CONFIG_COREBOOT_ROMSIZE_KB-16)*1024; + archive.start=(void *)(0UL-(CONFIG_COREBOOT_ROMSIZE_KB*1024)); ret = find_file(&archive, "normal/option_table", &result); if (ret) { @@ -223,8 +223,8 @@ int get_option(void *dest, char *name) if(get_cmos_value(ce->bit, ce->length, dest)) return(-3); - if(!rtc_checksum_valid(LB_CKS_RANGE_START, - LB_CKS_RANGE_END,LB_CKS_LOC)) + if(!rtc_checksum_valid(CB_CKS_RANGE_START, + CB_CKS_RANGE_END,CB_CKS_LOC)) return(-4); #if defined(CONFIG_OPTION_TABLE) && (CONFIG_OPTION_TABLE == 1) return(0); @@ -255,14 +255,14 @@ static int cmos_chksum_valid(void) u32 sum, old_sum; sum = 0; /* Comput the cmos checksum */ - for(addr = LB_CKS_RANGE_START; addr <= LB_CKS_RANGE_END; addr++) { + for(addr = CB_CKS_RANGE_START; addr <= CB_CKS_RANGE_END; addr++) { sum += CMOS_READ(addr); } sum = (sum & 0xffff) ^ 0xffff; /* Read the stored checksum */ - old_sum = CMOS_READ(LB_CKS_LOC) << 8; - old_sum |= CMOS_READ(LB_CKS_LOC+1); + old_sum = CMOS_READ(CB_CKS_LOC) << 8; + old_sum |= CMOS_READ(CB_CKS_LOC+1); return sum == old_sum; } diff --git a/arch/x86/post_code.c b/arch/x86/post_code.c index d824ab9dfb..fe2e6fb3c8 100644 --- a/arch/x86/post_code.c +++ b/arch/x86/post_code.c @@ -1,5 +1,5 @@ /* - * This file is part of the LinuxBIOS project. + * This file is part of the coreboot project. * * Copyright (C) 2007 Stefan Reinauer * diff --git a/arch/x86/serial.c b/arch/x86/serial.c index bc79c6f5dd..d373ae2171 100644 --- a/arch/x86/serial.c +++ b/arch/x86/serial.c @@ -1,5 +1,5 @@ /* - * This file is part of the LinuxBIOS project. + * This file is part of the coreboot project. * * Copyright (C) 2007 coresystems GmbH * (Written by Stefan Reinauer for coresystems GmbH) diff --git a/arch/x86/speaker.c b/arch/x86/speaker.c index e048ca9006..a28024af37 100644 --- a/arch/x86/speaker.c +++ b/arch/x86/speaker.c @@ -1,5 +1,5 @@ /* - * This file is part of the LinuxBIOS project. + * This file is part of the coreboot project. * * Copyright (C) 2007 Uwe Hermann * diff --git a/arch/x86/stage0_i586.S b/arch/x86/stage0_i586.S index eaea0ede9f..6a53ce1733 100644 --- a/arch/x86/stage0_i586.S +++ b/arch/x86/stage0_i586.S @@ -1,5 +1,5 @@ ## -## This file is part of the LinuxBIOS project. +## This file is part of the coreboot project. ## ## Copyright (C) 2000,2007 Ronald G. Minnich ## Copyright (C) 2005 Eswar Nallusamy, LANL diff --git a/arch/x86/stage1.c b/arch/x86/stage1.c index 4f9b2b16a0..d8ef3e1d69 100644 --- a/arch/x86/stage1.c +++ b/arch/x86/stage1.c @@ -1,5 +1,5 @@ /* - * This file is part of the LinuxBIOS project. + * This file is part of the coreboot project. * * Copyright (C) 2007 Stefan Reinauer * Copyright (C) 2007 Advanced Micro Devices, Inc. @@ -182,7 +182,7 @@ void __attribute__((stdcall)) stage1_main(u32 bist) else die("FATAL: No usable payload found.\n"); - die ("FATAL: Last stage returned to LinuxBIOS.\n"); + die ("FATAL: Last stage returned to coreboot.\n"); } diff --git a/arch/x86/udelay_io.c b/arch/x86/udelay_io.c index a5a416e1d1..63aa3a15e9 100644 --- a/arch/x86/udelay_io.c +++ b/arch/x86/udelay_io.c @@ -1,5 +1,5 @@ /* - * This file is part of the LinuxBIOS project. + * This file is part of the coreboot project. * * Copyright (C) 2005 coresystems GmbH * (Written by Stefan Reinauer for coresystems GmbH) diff --git a/device/Kconfig b/device/Kconfig index 79a0b9f3dc..bc666ea1bb 100644 --- a/device/Kconfig +++ b/device/Kconfig @@ -1,5 +1,5 @@ ## -## This file is part of the LinuxBIOS project. +## This file is part of the coreboot project. ## ## Copyright (C) 2007 coresystems GmbH ## (Written by Stefan Reinauer for coresystems GmbH) diff --git a/device/Makefile b/device/Makefile index cde973d839..bfcb9c56fb 100644 --- a/device/Makefile +++ b/device/Makefile @@ -1,5 +1,5 @@ ## -## This file is part of the LinuxBIOS project. +## This file is part of the coreboot project. ## ## Copyright (C) 2007 coresystems GmbH ## (Written by Stefan Reinauer for coresystems GmbH) diff --git a/device/agp_device.c b/device/agp_device.c index fcdbb70932..fde936ad15 100644 --- a/device/agp_device.c +++ b/device/agp_device.c @@ -1,5 +1,5 @@ /* - * This file is part of the LinuxBIOS project. + * This file is part of the coreboot project. * * Copyright (C) 2005 Linux Networx * (Written by Eric Biederman for Linux Networx) diff --git a/device/cardbus_device.c b/device/cardbus_device.c index a9070d3c06..35ea69cf64 100644 --- a/device/cardbus_device.c +++ b/device/cardbus_device.c @@ -1,5 +1,5 @@ /* - * This file is part of the LinuxBIOS project. + * This file is part of the coreboot project. * * Copyright (C) 2005 Linux Networx * (Written by Eric Biederman for Linux Networx) diff --git a/device/device.c b/device/device.c index c0e22448da..921348061f 100644 --- a/device/device.c +++ b/device/device.c @@ -1,5 +1,5 @@ /* - * This file is part of the LinuxBIOS project. + * This file is part of the coreboot project. * * It was originally based on the Linux kernel (arch/i386/kernel/pci-pc.c). * diff --git a/device/device_util.c b/device/device_util.c index 4b0781a018..09c56ae821 100644 --- a/device/device_util.c +++ b/device/device_util.c @@ -1,5 +1,5 @@ /* - * This file is part of the LinuxBIOS project. + * This file is part of the coreboot project. * * Copyright (C) 2003-2004 Linux Networx * (Written by Eric Biederman for Linux Networx) diff --git a/device/hypertransport.c b/device/hypertransport.c index 06a71041a0..34b50eba93 100644 --- a/device/hypertransport.c +++ b/device/hypertransport.c @@ -1,5 +1,5 @@ /* - * This file is part of the LinuxBIOS project. + * This file is part of the coreboot project. * * Copyright (C) 2003-2004 Linux Networx * (Written by Eric Biederman for Linux Networx) @@ -576,7 +576,7 @@ unsigned int hypertransport_scan_chain(struct bus *bus, unsigned int min_devfn, /* Die if any leftover static devices are found. * There's probably a problem in the Config.lb. - * TODO: No more Config.lb in LinuxBIOSv3. + * TODO: No more Config.lb in coreboot-v3. */ if (old_devices) { struct device *left; diff --git a/device/pci_device.c b/device/pci_device.c index df6b2e0a4f..05d6c27481 100644 --- a/device/pci_device.c +++ b/device/pci_device.c @@ -1,5 +1,5 @@ /* - * This file is part of the LinuxBIOS project. + * This file is part of the coreboot project. * * It was originally based on the Linux kernel (drivers/pci/pci.c). * @@ -272,7 +272,7 @@ static void pci_get_rom_resource(struct device *dev, unsigned long index) if ((dev->on_mainboard) && (dev->rom_address == 0)) { // Skip it if rom_address is not set in MB Config.lb. - // TODO: No more Config.lb in LinuxBIOSv3. + // TODO: No more Config.lb in coreboot-v3. return; } @@ -320,7 +320,7 @@ static void pci_get_rom_resource(struct device *dev, unsigned long index) /* For on board device with embedded ROM image, the ROM image is at * fixed address specified in the Config.lb, the dev->rom_address is * inited by driver_pci_onboard_ops::enable_dev() */ - /* TODO: No more Config.lb in LinuxBIOSv3. */ + /* TODO: No more Config.lb in coreboot-v3. */ if ((dev->on_mainboard) && (dev->rom_address != 0)) { resource->base = dev->rom_address; resource->flags |= IORESOURCE_MEM | IORESOURCE_READONLY | @@ -1131,7 +1131,7 @@ unsigned int pci_scan_bus(struct bus *bus, unsigned int min_devfn, /* Die if any leftover static devices are are found. * There's probably a problem in the Config.lb. - * TODO: No more Config.lb in LinuxBIOSv3. + * TODO: No more Config.lb in coreboot-v3. */ if (old_devices) { struct device *left; diff --git a/device/pci_ops.c b/device/pci_ops.c index 6559438bd1..b013c40a6f 100644 --- a/device/pci_ops.c +++ b/device/pci_ops.c @@ -1,5 +1,5 @@ /* - * This file is part of the LinuxBIOS project. + * This file is part of the coreboot project. * * Copyright (C) 2004 Linux Networx * (Written by Eric Biederman for Linux Networx) diff --git a/device/pci_rom.c b/device/pci_rom.c index a223b89c94..e9e6c5106e 100644 --- a/device/pci_rom.c +++ b/device/pci_rom.c @@ -1,5 +1,5 @@ /* - * This file is part of the LinuxBIOS project. + * This file is part of the coreboot project. * * Copyright (C) 2005 Li-Ta Lo * Copyright (C) 2005 Tyan diff --git a/device/pcie_device.c b/device/pcie_device.c index 63983351b0..1dabee18b5 100644 --- a/device/pcie_device.c +++ b/device/pcie_device.c @@ -1,5 +1,5 @@ /* - * This file is part of the LinuxBIOS project. + * This file is part of the coreboot project. * * Copyright (C) 2005 Linux Networx * (Written by Eric Biederman for Linux Networx) diff --git a/device/pcix_device.c b/device/pcix_device.c index 1eff7b101d..839a216388 100644 --- a/device/pcix_device.c +++ b/device/pcix_device.c @@ -1,5 +1,5 @@ /* - * This file is part of the LinuxBIOS project. + * This file is part of the coreboot project. * * Copyright (C) 2005 Linux Networx * (Written by Eric Biederman for Linux Networx) diff --git a/device/pnp_device.c b/device/pnp_device.c index 5c644277c9..e33f252222 100644 --- a/device/pnp_device.c +++ b/device/pnp_device.c @@ -1,5 +1,5 @@ /* - * This file is part of the LinuxBIOS project. + * This file is part of the coreboot project. * * Copyright (C) 2004 Linux Networx * (Written by Eric Biederman for Linux Networx) diff --git a/device/pnp_raw.c b/device/pnp_raw.c index d107c19fe5..1fd7b3bea6 100644 --- a/device/pnp_raw.c +++ b/device/pnp_raw.c @@ -1,5 +1,5 @@ /* - * This file is part of the LinuxBIOS project. + * This file is part of the coreboot project. * * Copyright (C) 2007 Ronald G. Minnich * Copyright (C) 2007 coresystems GmbH diff --git a/device/root_device.c b/device/root_device.c index cf87c3d3e3..4086e37201 100644 --- a/device/root_device.c +++ b/device/root_device.c @@ -1,5 +1,5 @@ /* - * This file is part of the LinuxBIOS project. + * This file is part of the coreboot project. * * Copyright (C) 2003-2004 Linux Networx * (Written by Eric Biederman for Linux Networx) diff --git a/device/smbus_ops.c b/device/smbus_ops.c index ab4be7bd34..e963d9a9f3 100644 --- a/device/smbus_ops.c +++ b/device/smbus_ops.c @@ -1,5 +1,5 @@ /* - * This file is part of the LinuxBIOS project. + * This file is part of the coreboot project. * * Copyright (C) 2004 Tyan * (Written by Yinghai Lu for Tyan) diff --git a/doc/design/flashlayout.fig b/doc/design/flashlayout.fig index 0ea1810743..9ba38a1cf6 100644 --- a/doc/design/flashlayout.fig +++ b/doc/design/flashlayout.fig @@ -31,9 +31,9 @@ Single 4 0 0 50 -1 0 12 0.0000 4 135 360 3375 900 lzma\001 4 0 0 50 -1 0 12 0.0000 4 135 420 3375 1125 nrv2b\001 4 0 0 50 -1 0 12 0.0000 4 135 1080 3375 1350 normal/initram\001 -4 0 0 50 -1 0 12 0.0000 4 135 1635 3375 1575 normal/linuxbios.lzma\001 +4 0 0 50 -1 0 12 0.0000 4 135 1635 3375 1575 normal/coreboot.lzma\001 4 0 0 50 -1 0 12 0.0000 4 135 1170 3375 1800 fallback/initram\001 -4 0 0 50 -1 0 12 0.0000 4 135 1725 3375 2025 fallback/linuxbios.lzma\001 +4 0 0 50 -1 0 12 0.0000 4 135 1725 3375 2025 fallback/coreboot.lzma\001 4 0 0 50 -1 0 12 0.0000 4 135 2130 3375 2250 memtest86/memtest86.lzma\001 4 0 0 50 -1 0 12 0.0000 4 180 990 3375 2475 vgabios.lzma\001 4 0 0 50 -1 0 12 0.0000 4 180 1020 2625 4275 Basic startup\001 diff --git a/doc/design/newboot.lyx b/doc/design/newboot.lyx index 8bbe641be7..51921db17c 100644 --- a/doc/design/newboot.lyx +++ b/doc/design/newboot.lyx @@ -30,13 +30,13 @@ \begin_body \begin_layout Title -LinuxBIOS boot structure +coreboot boot structure \newline LA-UR-06-7928 \end_layout \begin_layout Author -New LinuxBIOS group +New coreboot group \newline \end_layout @@ -58,7 +58,7 @@ thispagestyle{empty} \end_layout \begin_layout Abstract -This is the new LinuxBIOS boot architecture. +This is the new coreboot boot architecture. \end_layout \begin_layout Section @@ -84,18 +84,18 @@ That is, "1." instead of just "1" \end_layout \begin_layout Standard -The new LinuxBIOS boot architecture depends on CAR, with payloads appearing +The new coreboot boot architecture depends on CAR, with payloads appearing as files in a LAR archive. The device tree is defined by a device tree blob (DTB) and all the activities flow from that. - For now, the DTC will produce a standard LinuxBIOS v2 device tree; this + For now, the DTC will produce a standard coreboot v2 device tree; this will, we hope, be improved. romcc is gone. \end_layout \begin_layout Standard -Required attributes of a CPU for LinuxBIOS v3: +Required attributes of a CPU for coreboot v3: \end_layout \begin_layout Itemize @@ -181,7 +181,7 @@ initram \end_layout \begin_layout Itemize -Traditional LinuxBIOS RAM code (LAR, etc.) +Traditional coreboot RAM code (LAR, etc.) \end_layout \begin_layout Itemize @@ -217,7 +217,7 @@ FLASH layout \end_layout \begin_layout Section -Introduction to the LinuxBIOS device tree +Introduction to the coreboot device tree \end_layout \begin_layout Subsection @@ -225,8 +225,8 @@ Purpose and function \end_layout \begin_layout Standard -The LinuxBIOS device tree is probably the single most important concept - in LinuxBIOS, and, in V2, was the least understood part of the software. +The coreboot device tree is probably the single most important concept + in coreboot, and, in V2, was the least understood part of the software. The device tree provides a tremendous amount of capability to the software. The initial tree, which almost always will be an incomplete representation of the hardware (consider pluggable devices), is created by the configuration @@ -303,7 +303,7 @@ Device tree structures \end_layout \begin_layout Standard -There are three primary objects which are used to manage the LinuxBIOS device +There are three primary objects which are used to manage the coreboot device tree: devices, links, and drivers. Devices and links are generic structures: drivers, on the other hand, are specialized. @@ -353,7 +353,7 @@ path But, not all devices have identical capabilities. Some PCI devices have IDE controllers, others do not; some can drive the legacy PC XBUS, others can not; and so on. - In LinuxBIOS V1, we attempted to create devices that were the union of + In coreboot V1, we attempted to create devices that were the union of all possible devices, but creating such a union proved to be impossible, as new devices with new capabilities came out. So, in V2, we split off the device-specific information into a seperate @@ -417,7 +417,7 @@ The files in the i440bx directory. \end_layout \begin_layout LyX-Code -[rminnich@q ~]$ ls ~/src/bios/LinuxBIOSv3/northbridge/intel/i440bxemulation/ +[rminnich@q ~]$ ls ~/src/bios/coreboot-v3/northbridge/intel/i440bxemulation/ \end_layout @@ -1403,7 +1403,7 @@ If all the tests pass, run each one, in order, decompressing those which If the checksum fails, If the test fails, use the backup property in the option node to find a backup. initram is (C, PIC) as it must execute in place. - The LinuxBIOS payload will be uncompressed to RAM, and is in C, but need + The coreboot payload will be uncompressed to RAM, and is in C, but need not be PIC. \end_layout @@ -1780,7 +1780,7 @@ lzma \end_layout \begin_layout Standard -This is for creating the linuxbios.lzma file. +This is for creating the coreboot.lzma file. \end_layout @@ -1797,7 +1797,7 @@ This is for creating initram. \end_layout \begin_layout Subsection -linuxbios_ram +coreboot_ram \end_layout \begin_layout Standard @@ -1819,7 +1819,7 @@ This is what we boot. \end_layout \begin_layout Subsection -linuxbios.lar +coreboot.lar \end_layout \begin_layout Standard @@ -1831,7 +1831,7 @@ file system \begin_inset Quotes erd \end_inset - that contains the lzma, initram, linuxbios_ram, and payload targets. + that contains the lzma, initram, coreboot_ram, and payload targets. \end_layout @@ -1913,7 +1913,7 @@ Any redundancy in the config/build process should be removed. \begin_layout Itemize Global vs. local builds - pros/cons with kernel style (global) build (always produces - arch/x/*Image) and LBv2 style build (produces target/x/y/z/linuxbios.rom + arch/x/*Image) and coreboot v2 style build (produces target/x/y/z/coreboot.rom for each target) Either way the config/build system must be consistently either global or local. \end_layout @@ -1946,15 +1946,15 @@ One idea is a kind of iterative config with increasing resolution per iteration. \begin_layout Itemize Payload. - I say something must be included in the LB tree or trivially added to a + I say something must be included in the coreboot tree or trivially added to a tree by download or command. FILO is candidate for inclusion. - What's up with FILO(EB) and FILO(LB) ? Merge them? Make EB default payload? + What's up with FILO(EB) and FILO(CB) ? Merge them? Make EB default payload? FILO? memtest86? All about making a usable product. memtest86 would have to be explicitly selected in expert mode in favor of the default option that would be able to load an OS. Doesn't matter much if it's only Linux right now because that's the most - likely boot candidate for early LB adopters. + likely boot candidate for early CB adopters. \end_layout \begin_layout Itemize @@ -2118,11 +2118,11 @@ CAR \begin_layout Standard Next we bring in the initram.c from v2. - This is LinuxBIOSv2/src/mainboard/amd/norwich/cache_as_ram_auto.c. + This is coreboot-v2/src/mainboard/amd/norwich/cache_as_ram_auto.c. It will not build in V3, as the includes are wrong. We fix these and, while we are at it, change the entry point to be called main(). - This file will be a standalone file in the LinuxBIOS Archive (LAR), and + This file will be a standalone file in the coreboot Lightweight Archive (LAR), and hence needs to have main() as the entry point. \end_layout @@ -2138,43 +2138,43 @@ We pretty much get a ton of errors once include is fixed. \begin_layout LyX-Code \size tiny -/home/rminnich/src/bios/LinuxBIOSv3/mainboard/amd/norwich/initram.c: In function - 'spd_read_byte': /home/rminnich/src/bios/LinuxBIOSv3/mainboard/amd/norwich/init +/home/rminnich/src/bios/coreboot-v3/mainboard/amd/norwich/initram.c: In function + 'spd_read_byte': /home/rminnich/src/bios/coreboot-v3/mainboard/amd/norwich/init ram.c:30: error: implicit declaration of function 'smbus_read_byte' /home/rminnic -h/src/bios/LinuxBIOSv3/mainboard/amd/norwich/initram.c: In function 'msr_init': - /home/rminnich/src/bios/LinuxBIOSv3/mainboard/amd/norwich/initram.c:41: +h/src/bios/coreboot-v3/mainboard/amd/norwich/initram.c: In function 'msr_init': + /home/rminnich/src/bios/coreboot-v3/mainboard/amd/norwich/initram.c:41: error: 'msr_t' undeclared (first use in this function) /home/rminnich/src/bios/ -LinuxBIOSv3/mainboard/amd/norwich/initram.c:41: error: (Each undeclared identifie -r is reported only once /home/rminnich/src/bios/LinuxBIOSv3/mainboard/amd/norwic -h/initram.c:41: error: for each function it appears in.) /home/rminnich/src/bios/L -inuxBIOSv3/mainboard/amd/norwich/initram.c:41: error: expected ';' before - 'msr' /home/rminnich/src/bios/LinuxBIOSv3/mainboard/amd/norwich/initram.c:43: - error: 'msr' undeclared (first use in this function) /home/rminnich/src/bios/Li -nuxBIOSv3/mainboard/amd/norwich/initram.c:45: error: implicit declaration - of function 'wrmsr' /home/rminnich/src/bios/LinuxBIOSv3/mainboard/amd/norwich/i -nitram.c: In function 'main': /home/rminnich/src/bios/LinuxBIOSv3/mainboard/amd/n +coreboot-v3/mainboard/amd/norwich/initram.c:41: error: (Each undeclared identifie +r is reported only once /home/rminnich/src/bios/coreboot-v3/mainboard/amd/norwic +h/initram.c:41: error: for each function it appears in.) /home/rminnich/src/bios/c +oreboot-v3/mainboard/amd/norwich/initram.c:41: error: expected ';' before + 'msr' /home/rminnich/src/bios/coreboot-v3/mainboard/amd/norwich/initram.c:43: + error: 'msr' undeclared (first use in this function) /home/rminnich/src/bios/co +reboot-v3/mainboard/amd/norwich/initram.c:45: error: implicit declaration + of function 'wrmsr' /home/rminnich/src/bios/coreboot-v3/mainboard/amd/norwich/i +nitram.c: In function 'main': /home/rminnich/src/bios/coreboot-v3/mainboard/amd/n orwich/initram.c:79: error: implicit declaration of function 'POST_CODE' - /home/rminnich/src/bios/LinuxBIOSv3/mainboard/amd/norwich/initram.c:81: - error: array type has incomplete element type /home/rminnich/src/bios/LinuxBIOS + /home/rminnich/src/bios/coreboot-v3/mainboard/amd/norwich/initram.c:81: + error: array type has incomplete element type /home/rminnich/src/bios/coreboot- v3/mainboard/amd/norwich/initram.c:82: error: field name not in record or - union initializer /home/rminnich/src/bios/LinuxBIOSv3/mainboard/amd/norwich/ini -tram.c:82: error: (near initialization for 'memctrl') /home/rminnich/src/bios/Lin -uxBIOSv3/mainboard/amd/norwich/initram.c:85: error: implicit declaration - of function 'SystemPreInit' /home/rminnich/src/bios/LinuxBIOSv3/mainboard/amd/n + union initializer /home/rminnich/src/bios/coreboot-v3/mainboard/amd/norwich/ini +tram.c:82: error: (near initialization for 'memctrl') /home/rminnich/src/bios/cor +eboot-v3/mainboard/amd/norwich/initram.c:85: error: implicit declaration + of function 'SystemPreInit' /home/rminnich/src/bios/coreboot-v3/mainboard/amd/n orwich/initram.c:88: error: implicit declaration of function 'cs5536_early_setup' - /home/rminnich/src/bios/LinuxBIOSv3/mainboard/amd/norwich/initram.c:95: + /home/rminnich/src/bios/coreboot-v3/mainboard/amd/norwich/initram.c:95: error: implicit declaration of function 'cs5536_setup_onchipuart' /home/rminnic -h/src/bios/LinuxBIOSv3/mainboard/amd/norwich/initram.c:97: error: implicit - declaration of function 'uart_init' /home/rminnich/src/bios/LinuxBIOSv3/mainboa +h/src/bios/coreboot-v3/mainboard/amd/norwich/initram.c:97: error: implicit + declaration of function 'uart_init' /home/rminnich/src/bios/coreboot-v3/mainboa rd/amd/norwich/initram.c:100: error: implicit declaration of function 'pll_reset' - /home/rminnich/src/bios/LinuxBIOSv3/mainboard/amd/norwich/initram.c:102: - error: implicit declaration of function 'cpuRegInit' /home/rminnich/src/bios/Li -nuxBIOSv3/mainboard/amd/norwich/initram.c:104: error: implicit declaration - of function 'sdram_initialize' /home/rminnich/src/bios/LinuxBIOSv3/mainboard/am + /home/rminnich/src/bios/coreboot-v3/mainboard/amd/norwich/initram.c:102: + error: implicit declaration of function 'cpuRegInit' /home/rminnich/src/bios/co +reboot-v3/mainboard/amd/norwich/initram.c:104: error: implicit declaration + of function 'sdram_initialize' /home/rminnich/src/bios/coreboot-v3/mainboard/am d/norwich/initram.c:110: warning: 'return' with no value, in function returning - non-void /home/rminnich/src/bios/LinuxBIOSv3/mainboard/amd/norwich/initram.c:81: + non-void /home/rminnich/src/bios/coreboot-v3/mainboard/amd/norwich/initram.c:81: warning: unused variable 'memctrl' make: exit 2 make: *** [/home/rminnich/src/b -ios/LinuxBIOSv3/build/mainboard/amd/norwich/initram.o] Error 1 +ios/coreboot-v3/build/mainboard/amd/norwich/initram.o] Error 1 \end_layout \begin_layout Standard @@ -2191,7 +2191,7 @@ Hold on. \begin_layout Standard We need to create an initram file for the LAR. This initram file is going to set up DRAM. - LinuxBIOS supplies a skeleton function, which we show below, and the programmer + Coreboot supplies a skeleton function, which we show below, and the programmer needs to supply some functions for their chipsets, so that this function can work. @@ -2442,7 +2442,7 @@ Any or all of these functions may be empty. \end_layout \begin_layout Standard -All of the LinuxBIOS code that is run after this point uses the device tree; +All of the coreboot code that is run after this point uses the device tree; none of the initram code uses the device tree. The reason is simple: the device tree lives in RAM. This bootstrap code is intentionally simple and does not use the device @@ -2472,7 +2472,7 @@ Get the old code: \end_layout \begin_layout LyX-Code -cp LinuxBIOSv2/src/southbridge/amd/cs5536/cs5536_early_smbus.c southbridge/amd/cs +cp coreboot-v2/src/southbridge/amd/cs5536/cs5536_early_smbus.c southbridge/amd/cs 5536/smbus_initram.c \end_layout @@ -2501,7 +2501,7 @@ R334 \begin_layout Standard The errors were mainly changes to printk. Also, we had to copy the old cs5536.h from the V2 tree. - This file is only used for the southbridge part, so, following LinuxBIOS + This file is only used for the southbridge part, so, following coreboot include rules, cs5536.h does not go in include; rather, it goes in the \family typewriter southbridge/amd/cs5536 diff --git a/include/arch/x86/amd_geodelx.h b/include/arch/x86/amd_geodelx.h index 04d3aa21b7..c24c1595be 100644 --- a/include/arch/x86/amd_geodelx.h +++ b/include/arch/x86/amd_geodelx.h @@ -1,5 +1,5 @@ /* - * This file is part of the LinuxBIOS project. + * This file is part of the coreboot project. * * Copyright (C) 2006 Indrek Kruusa * Copyright (C) 2006 Ronald G. Minnich @@ -568,7 +568,7 @@ #define DCACHE_RAM_SIZE 0x08000 #define DCACHE_RAM_BASE 0x80000 /* This is where the DCache will be mapped and be used as stack. It would be - * cool if it was the same base as LinuxBIOS normal stack. + * cool if it was the same base as coreboot normal stack. */ #define LX_STACK_BASE DCACHE_RAM_BASE #define LX_STACK_END LX_STACK_BASE + (DCACHE_RAM_SIZE - 4) diff --git a/include/arch/x86/arch/spinlock.h b/include/arch/x86/arch/spinlock.h index 83819e0806..e043ed6864 100644 --- a/include/arch/x86/arch/spinlock.h +++ b/include/arch/x86/arch/spinlock.h @@ -1,5 +1,5 @@ /* - * This file is part of the LinuxBIOS project. + * This file is part of the coreboot project. * * It is based on the Linux kernel file include/asm-i386/spinlock.h. * diff --git a/include/arch/x86/cpu.h b/include/arch/x86/cpu.h index 13290bf6ea..be50a190cc 100644 --- a/include/arch/x86/cpu.h +++ b/include/arch/x86/cpu.h @@ -1,5 +1,5 @@ /* - * This file is part of the LinuxBIOS project. + * This file is part of the coreboot project. * * It is based on the Linux kernel files include/asm-i386/processor.h * and arch/i386/kernel/cpu/mtrr/state.c. diff --git a/include/arch/x86/div64.h b/include/arch/x86/div64.h index 2764073822..e35bcd8432 100644 --- a/include/arch/x86/div64.h +++ b/include/arch/x86/div64.h @@ -1,5 +1,5 @@ /* - * This file is part of the LinuxBIOS project. + * This file is part of the coreboot project. * * It was taken from the Linux kernel, include/asm-i386/div64.h. */ diff --git a/include/arch/x86/legacy.h b/include/arch/x86/legacy.h index 784bf3be27..98e131fa0e 100644 --- a/include/arch/x86/legacy.h +++ b/include/arch/x86/legacy.h @@ -1,5 +1,5 @@ /* - * This file is part of the LinuxBIOS project. + * This file is part of the coreboot project. * * Copyright (C) 2007 Uwe Hermann * diff --git a/include/arch/x86/msr.h b/include/arch/x86/msr.h index 48e12c4a7e..3322a81747 100644 --- a/include/arch/x86/msr.h +++ b/include/arch/x86/msr.h @@ -1,5 +1,5 @@ /* - * This file is part of the LinuxBIOS project. + * This file is part of the coreboot project. * * Copyright (C) 2007 Ronald G. Minnich * diff --git a/include/arch/x86/swab.h b/include/arch/x86/swab.h index e53e8a07fa..f123c411f4 100644 --- a/include/arch/x86/swab.h +++ b/include/arch/x86/swab.h @@ -1,5 +1,5 @@ /** - * This file is part of the LinuxBIOS project. + * This file is part of the coreboot project. * * It is based on include/linux/byteorder/swab.h from the Linux kernel. */ diff --git a/include/device/device.h b/include/device/device.h index 66f5807428..0b2c836a8f 100644 --- a/include/device/device.h +++ b/include/device/device.h @@ -1,5 +1,5 @@ /* - * This file is part of the LinuxBIOS project. + * This file is part of the coreboot project. * * Copyright (C) 2007 Ronald G. Minnich * diff --git a/include/device/pci.h b/include/device/pci.h index ce9a347406..ae56729777 100644 --- a/include/device/pci.h +++ b/include/device/pci.h @@ -1,5 +1,5 @@ /* - * This file is part of the LinuxBIOS project. + * This file is part of the coreboot project. * * PCI defines and function prototypes * Copyright 1994, Drew Eckhardt diff --git a/include/device/pci_ids.h b/include/device/pci_ids.h index 61242bcf0b..660b290906 100644 --- a/include/device/pci_ids.h +++ b/include/device/pci_ids.h @@ -1,10 +1,10 @@ /* - * This file is part of the LinuxBIOS project. + * This file is part of the coreboot project. * * It is based on the include/linux/pci_ids.h file from the Linux kernel. * * Note: we maintain our own short list of PCI vendor IDs and device IDs - * for LinuxBIOS, as we only need very few of the entries. + * for coreboot, as we only need very few of the entries. * The 'Device classes and subclasses' section is copied from the Linux file. */ diff --git a/include/elf.h b/include/elf.h index 729fe00775..60a977a10b 100644 --- a/include/elf.h +++ b/include/elf.h @@ -1,5 +1,5 @@ /* - * This file is part of the LinuxBIOS project. + * This file is part of the coreboot project. * * It is based on elf/elf.h from the GNU C Library, CVS rev. 1.156. * @@ -2628,8 +2628,8 @@ extern void jmp_to_elf_entry(void *entry); struct lb_memory; extern int elfboot(struct lb_memory *mem); -#define FIRMWARE_TYPE "LinuxBIOS" +#define FIRMWARE_TYPE "coreboot" #define BOOTLOADER "elfboot" -#define BOOTLOADER_VERSION "1.3" +#define BOOTLOADER_VERSION "3.0" #endif /* ELF_H */ diff --git a/include/ip_checksum.h b/include/ip_checksum.h index b0dfbcd0a1..195ced2f99 100644 --- a/include/ip_checksum.h +++ b/include/ip_checksum.h @@ -1,5 +1,5 @@ /* - * This file is part of the LinuxBIOS project. + * This file is part of the coreboot project. * * It was taken from kexec-tools 1.101. * diff --git a/include/isa-dma.h b/include/isa-dma.h index da46045072..2174e09e01 100644 --- a/include/isa-dma.h +++ b/include/isa-dma.h @@ -1,5 +1,5 @@ /* - * This file is part of the LinuxBIOS project. + * This file is part of the coreboot project. * * Copyright (C) 2007 Stefan Reinauer * diff --git a/include/keyboard.h b/include/keyboard.h index b92c0aa5e5..acad7655cd 100644 --- a/include/keyboard.h +++ b/include/keyboard.h @@ -1,5 +1,5 @@ /* - * This file is part of the LinuxBIOS project. + * This file is part of the coreboot project. * * Copyright (C) 2007 Stefan Reinauer * @@ -20,7 +20,7 @@ #ifndef KEYBOARD_H #define KEYBOARD_H -/* TODO: This structure should contain typematic settings, but LinuxBIOS +/* TODO: This structure should contain typematic settings, but coreboot * does not care yet. */ struct pc_keyboard { diff --git a/include/lar.h b/include/lar.h index f167d9036a..95b411a6cc 100644 --- a/include/lar.h +++ b/include/lar.h @@ -1,5 +1,5 @@ /* - * This file is part of the LinuxBIOS project. + * This file is part of the coreboot project. * * Copyright (C) 2006 coresystems GmbH * (Written by Stefan Reinauer for coresystems GmbH) diff --git a/include/lib.h b/include/lib.h index a87a2057ef..0757863d7d 100644 --- a/include/lib.h +++ b/include/lib.h @@ -1,5 +1,5 @@ /* - * This file is part of the LinuxBIOS project. + * This file is part of the coreboot project. * * Copyright (C) 2007 coresystems GmbH * (Written by Stefan Reinauer for coresystems GmbH) diff --git a/include/mc146818rtc.h b/include/mc146818rtc.h index cde5f3b6fd..356a002fcc 100644 --- a/include/mc146818rtc.h +++ b/include/mc146818rtc.h @@ -101,15 +101,15 @@ #define PC_CKS_RANGE_END 45 #define PC_CKS_LOC 46 -/* Linux bios checksum is built only over bytes 49..125 */ -#ifndef LB_CKS_RANGE_START -#define LB_CKS_RANGE_START 49 +/* coreboot checksum is built only over bytes 49..125 */ +#ifndef CB_CKS_RANGE_START +#define CB_CKS_RANGE_START 49 #endif -#ifndef LB_CKS_RANGE_END -#define LB_CKS_RANGE_END 125 +#ifndef CB_CKS_RANGE_END +#define CB_CKS_RANGE_END 125 #endif -#ifndef LB_CKS_LOC -#define LB_CKS_LOC 126 +#ifndef CB_CKS_LOC +#define CB_CKS_LOC 126 #endif #define RTC_BOOT_BYTE 48 diff --git a/include/post_code.h b/include/post_code.h index 1f99943c1f..86a8e063b8 100644 --- a/include/post_code.h +++ b/include/post_code.h @@ -1,5 +1,5 @@ /* - * This file is part of the LinuxBIOS project. + * This file is part of the coreboot project. * * Copyright (C) 2007 Ronald G. Minnich * diff --git a/include/shared.h b/include/shared.h index dce8f7fcc0..f146854dd6 100644 --- a/include/shared.h +++ b/include/shared.h @@ -1,5 +1,5 @@ /* - * This file is part of the LinuxBIOS project + * This file is part of the coreboot project * * Copyright(C) 2007 coresystems GmbH * Written by Stefan Reinauer diff --git a/include/spd.h b/include/spd.h index c69791dcbd..59eb88691c 100644 --- a/include/spd.h +++ b/include/spd.h @@ -1,5 +1,5 @@ /* - * This file is part of the LinuxBIOS project. + * This file is part of the coreboot project. * * Copyright (C) 2005 Digital Design Corporation * Copyright (C) 2006 Uwe Hermann diff --git a/include/spinlock.h b/include/spinlock.h index c475d2d72a..2019586f4b 100644 --- a/include/spinlock.h +++ b/include/spinlock.h @@ -1,5 +1,5 @@ /* - * This file is part of the LinuxBIOS project. + * This file is part of the coreboot project. * * Copyright (C) 2001 Linux Networx * (Written by Eric Biederman for Linux Networx) diff --git a/include/string.h b/include/string.h index f4bfb4c71d..87212df4ba 100644 --- a/include/string.h +++ b/include/string.h @@ -1,5 +1,5 @@ /* - * This file is part of the LinuxBIOS project. + * This file is part of the coreboot project. * * Copyright (C) 2007 Uwe Hermann * diff --git a/include/tables.h b/include/tables.h index fefbd61eb9..6ee51f2d95 100644 --- a/include/tables.h +++ b/include/tables.h @@ -1,5 +1,5 @@ /* - * This file is part of the LinuxBIOS project. + * This file is part of the coreboot project. * * Copyright (C) 2002 Linux Networx * (Written by Eric Biederman for Linux Networx) @@ -24,15 +24,15 @@ #define TABLES_H /* - * Table management structs and prototypes for LinuxBIOS. + * Table management structs and prototypes for coreboot. * - * ALL structs and prototypes for tables that LinuxBIOS generates should be + * ALL structs and prototypes for tables that coreboot generates should be * defined here. */ struct lb_memory *write_tables(void); -/* The LinuxBIOS table information is for conveying information +/* The coreboot table information is for conveying information * from the firmware to the loaded OS image. Primarily this * is expected to be information that cannot be discovered by * other means, such as quering the hardware directly. @@ -60,12 +60,12 @@ struct lb_memory *write_tables(void); * table entries and be backwards compatible, but it is not required. */ -/* Since LinuxBIOS is usually compiled 32bit, gcc will align 64bit - * types to 32bit boundaries. If the LinuxBIOS table is dumped on a +/* Since coreboot is usually compiled 32bit, gcc will align 64bit + * types to 32bit boundaries. If the coreboot table is dumped on a * 64bit system, a u64 would be aligned to 64bit boundaries, * breaking the table format. * - * lb_uint64 will keep 64bit LinuxBIOS table values aligned to 32bit + * lb_uint64 will keep 64bit coreboot table values aligned to 32bit * to ensure compatibility. They can be accessed with the two functions * below: unpack_lb64() and pack_lb64() * @@ -249,7 +249,7 @@ struct cmos_checksum { }; struct lb_memory *arch_write_tables(void); -unsigned long write_linuxbios_table( +unsigned long write_coreboot_table( unsigned long low_table_start, unsigned long low_table_end, unsigned long rom_table_start, unsigned long rom_table_end); @@ -262,8 +262,8 @@ struct lb_memory *lb_memory(struct lb_header *header); struct lb_mainboard *lb_mainboard(struct lb_header *header); unsigned long lb_table_fini(struct lb_header *header); -/* Routines to extract part so the linuxBIOS table or information - * from the linuxBIOS table. +/* Routines to extract part so the coreboot table or information + * from the coreboot table. */ struct lb_memory *get_lb_mem(void); diff --git a/lib/Kconfig b/lib/Kconfig index 798f57e144..c6b007f0f0 100644 --- a/lib/Kconfig +++ b/lib/Kconfig @@ -1,5 +1,5 @@ ## -## This file is part of the LinuxBIOS project. +## This file is part of the coreboot project. ## ## Copyright (C) 2007 coresystems GmbH ## (Written by Stefan Reinauer for coresystems GmbH) @@ -54,7 +54,7 @@ config DEFAULT_COMPRESSION_NRV2B config DEFAULT_COMPRESSION_NONE bool "No compression" help - Do not compress any LinuxBIOS modules per default. + Do not compress any coreboot modules per default. endchoice @@ -139,7 +139,7 @@ config CONSOLE_SERIAL default y depends CONSOLE help - Send LinuxBIOS output to serial console. + Send coreboot output to serial console. choice prompt "Serial console COM port" @@ -194,7 +194,7 @@ config CONSOLE_USB boolean "USB2 console support (EXPERIMENTAL)" depends CONSOLE && EXPERIMENTAL help - Send LinuxBIOS output to USB2 (EHCI) console. + Send coreboot output to USB2 (EHCI) console. Note: This requires a USB2 controller which supports the EHCI Debug Port capability. Controllers which are known to work: @@ -210,7 +210,7 @@ config CONSOLE_USB * 8086:2836 Intel ICH8 * 8086:283a Intel ICH8 - See http://linuxbios.org/EHCI_Debug_Port for an up-to-date list. + See http://www.coreboot.org/EHCI_Debug_Port for an up-to-date list. comment "Cosmetic console options" depends EXPERT && (CONSOLE_SERIAL || CONSOLE_USB) @@ -220,7 +220,7 @@ config CONSOLE_PREFIX depends EXPERT && (CONSOLE_SERIAL || CONSOLE_USB) default n help - When you enable this option, LinuxBIOS will prefix each line of + When you enable this option, coreboot will prefix each line of console output with '(LB)'. endmenu diff --git a/lib/Makefile b/lib/Makefile index d3408cc2c1..dba929a0f6 100644 --- a/lib/Makefile +++ b/lib/Makefile @@ -1,5 +1,5 @@ ## -## This file is part of the LinuxBIOS project. +## This file is part of the coreboot project. ## ## Copyright (C) 2006-2007 coresystems GmbH ## (Written by Stefan Reinauer for coresystems GmbH) diff --git a/lib/clog2.c b/lib/clog2.c index 3a2f125e4c..37e3843638 100644 --- a/lib/clog2.c +++ b/lib/clog2.c @@ -1,5 +1,5 @@ /* - * This file is part of the LinuxBIOS project. + * This file is part of the coreboot project. * * It is based on the file js/src/jscpucfg.c from Mozilla, CVS rev. 3.25. * See http://lxr.mozilla.org/mozilla1.8.0/source/js/src/jscpucfg.c. diff --git a/lib/compute_ip_checksum.c b/lib/compute_ip_checksum.c index c2c07f99b9..06650b128b 100644 --- a/lib/compute_ip_checksum.c +++ b/lib/compute_ip_checksum.c @@ -1,5 +1,5 @@ /* - * This file is part of the LinuxBIOS project. + * This file is part of the coreboot project. * * It was taken from kexec-tools 1.101. * diff --git a/lib/console.c b/lib/console.c index 72ee7a36c7..87c2e0defb 100644 --- a/lib/console.c +++ b/lib/console.c @@ -72,11 +72,11 @@ void banner(int level, const char *s) void console_init(void) { static const char console_test[] = - "\n\nLinuxBIOS-" - LINUXBIOS_VERSION - LINUXBIOS_EXTRA_VERSION + "\n\ncoreboot-" + COREBOOT_VERSION + COREBOOT_EXTRA_VERSION " " - LINUXBIOS_BUILD + COREBOOT_BUILD " starting...\n"; printk(BIOS_INFO, console_test); diff --git a/lib/delay.c b/lib/delay.c index 0e547cc600..dbb89c6ed6 100644 --- a/lib/delay.c +++ b/lib/delay.c @@ -1,5 +1,5 @@ /* - * This file is part of the LinuxBIOS project. + * This file is part of the coreboot project. * * Copyright (C) 2001 Linux Networx * (Written by Eric Biederman for Linux Networx) diff --git a/lib/elfboot.c b/lib/elfboot.c index a2c66c11ca..a2bd7e0798 100644 --- a/lib/elfboot.c +++ b/lib/elfboot.c @@ -1,5 +1,5 @@ /* - * This file is part of the LinuxBIOS project. + * This file is part of the coreboot project. * * Copyright (C) 2002 Linux Networx * (Written by Eric Biederman for Linux Networx) @@ -21,7 +21,7 @@ /* elfboot -- boot elf images */ -/* This code is modified from the LinuxBIOS V2 version as follows: +/* This code is modified from the coreboot V2 version as follows: * great simplified * checksum removed -- lar can do that * can run from read-only FLASH diff --git a/lib/lar.c b/lib/lar.c index 8cf593bbe7..3eb1fccbd8 100644 --- a/lib/lar.c +++ b/lib/lar.c @@ -1,5 +1,5 @@ /* - * This file is part of the LinuxBIOS project. + * This file is part of the coreboot project. * * Copyright (C) 2006-2007 coresystems GmbH * (Written by Stefan Reinauer for coresystems GmbH) diff --git a/lib/lzma.c b/lib/lzma.c index c79ebe3649..2f84a03335 100644 --- a/lib/lzma.c +++ b/lib/lzma.c @@ -1,6 +1,6 @@ /* -LinuxBIOS interface to memory-saving variant of LZMA decoder +coreboot interface to memory-saving variant of LZMA decoder (C)opyright 2006 Carl-Daniel Hailfinger Released under the GNU GPL diff --git a/lib/mem.c b/lib/mem.c index 58777e7143..68103457b6 100644 --- a/lib/mem.c +++ b/lib/mem.c @@ -1,5 +1,5 @@ /* - * This file is part of the LinuxBIOS project. + * This file is part of the coreboot project. * * Copyright (C) 2007 Ronald G. Minnich * Copyright (C) 2007 Peter Stuge diff --git a/lib/ram.c b/lib/ram.c index e3eb03d3c4..5f7e4333a1 100644 --- a/lib/ram.c +++ b/lib/ram.c @@ -1,5 +1,5 @@ /* - * This file is part of the LinuxBIOS project. + * This file is part of the coreboot project. * * Copyright (C) 2007 Ronald G. Minnich * Copyright (C) 2007 Uwe Hermann diff --git a/lib/stage2.c b/lib/stage2.c index 20941664ca..feafc9be02 100644 --- a/lib/stage2.c +++ b/lib/stage2.c @@ -1,5 +1,5 @@ /* - * This file is part of the LinuxBIOS project. + * This file is part of the coreboot project. * * Copyright (C) 2007 Ron Minnich * Copyright (C) 2007 coresystems GmbH @@ -19,7 +19,7 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA, 02110-1301 USA */ -/* stage2 - LinuxBIOS RAM-based setup. */ +/* stage2 - coreboot RAM-based setup. */ #include #include @@ -29,9 +29,9 @@ #include /** - * Main function of the DRAM part of LinuxBIOS. + * Main function of the DRAM part of coreboot. * - * LinuxBIOS is divided into pre-DRAM part and DRAM part. The stages before + * Coreboot is divided into pre-DRAM part and DRAM part. The stages before * this part are stage 0 and stage 1. This part contains stage 2, which * consists of phases 1 through 6. * printk has been set up in stage 1 and is working. diff --git a/lib/string.c b/lib/string.c index 6524dbd2f4..9e09dbcc6d 100644 --- a/lib/string.c +++ b/lib/string.c @@ -1,5 +1,5 @@ /* - * This file is part of the LinuxBIOS project. + * This file is part of the coreboot project. * * Copyright (C) 2007 Uwe Hermann * diff --git a/lib/tables.c b/lib/tables.c index 9105fe6803..0f9f24978b 100644 --- a/lib/tables.c +++ b/lib/tables.c @@ -1,5 +1,5 @@ /* - * This file is part of the LinuxBIOS project. + * This file is part of the coreboot project. * * Copyright (C) 2002 Linux Networx * (Written by Eric Biederman for Linux Networx) @@ -19,7 +19,7 @@ */ /* - * Table management code for LinuxBIOS. + * Table management code for coreboot. * * This is the architecture-independent driver; it has a hook to * architecture-dependent code. diff --git a/lib/vsprintf.c b/lib/vsprintf.c index 61eea1bb92..08d926a084 100644 --- a/lib/vsprintf.c +++ b/lib/vsprintf.c @@ -1,5 +1,5 @@ /* - * This file is part of the LinuxBIOS project. + * This file is part of the coreboot project. * * It is based on the Linux kernel (lib/vsprintf.c). * diff --git a/lib/vtxprintf.c b/lib/vtxprintf.c index 08f4bc92b6..792d511e8c 100644 --- a/lib/vtxprintf.c +++ b/lib/vtxprintf.c @@ -1,5 +1,5 @@ /* - * This file is part of the LinuxBIOS project. + * This file is part of the coreboot project. * * It is based on the Linux kernel (lib/vsprintf.c). * diff --git a/mainboard/Kconfig b/mainboard/Kconfig index 8faff0dc31..eeb44a64cf 100644 --- a/mainboard/Kconfig +++ b/mainboard/Kconfig @@ -1,5 +1,5 @@ ## -## This file is part of the LinuxBIOS project. +## This file is part of the coreboot project. ## ## Copyright (C) 2006 Segher Boessenkool ## Copyright (C) 2006-2007 coresystems GmbH @@ -62,42 +62,42 @@ source "mainboard/pcengines/Kconfig" choice prompt "ROM chip size" - default LINUXBIOS_ROMSIZE_KB_256 + default COREBOOT_ROMSIZE_KB_256 -config LINUXBIOS_ROMSIZE_KB_128 +config COREBOOT_ROMSIZE_KB_128 bool "128 KB" help Choose this option if you have a 128 KB ROM chip. -config LINUXBIOS_ROMSIZE_KB_256 +config COREBOOT_ROMSIZE_KB_256 bool "256 KB" help Choose this option if you have a 256 KB ROM chip. -config LINUXBIOS_ROMSIZE_KB_512 +config COREBOOT_ROMSIZE_KB_512 bool "512 KB" help Choose this option if you have a 512 KB ROM chip. -config LINUXBIOS_ROMSIZE_KB_1024 +config COREBOOT_ROMSIZE_KB_1024 bool "1024 KB (1 MB)" help Choose this option if you have a 1024 KB (1 MB) ROM chip. -config LINUXBIOS_ROMSIZE_KB_2048 +config COREBOOT_ROMSIZE_KB_2048 bool "2048 KB (2 MB)" help Choose this option if you have a 2048 KB (2 MB) ROM chip. endchoice -config LINUXBIOS_ROMSIZE_KB +config COREBOOT_ROMSIZE_KB int - default 128 if LINUXBIOS_ROMSIZE_KB_128 - default 256 if LINUXBIOS_ROMSIZE_KB_256 - default 512 if LINUXBIOS_ROMSIZE_KB_512 - default 1024 if LINUXBIOS_ROMSIZE_KB_1024 - default 2048 if LINUXBIOS_ROMSIZE_KB_2048 + default 128 if COREBOOT_ROMSIZE_KB_128 + default 256 if COREBOOT_ROMSIZE_KB_256 + default 512 if COREBOOT_ROMSIZE_KB_512 + default 1024 if COREBOOT_ROMSIZE_KB_1024 + default 2048 if COREBOOT_ROMSIZE_KB_2048 help Map the config names to an integer. diff --git a/mainboard/adl/Kconfig b/mainboard/adl/Kconfig index 19ebcf6c46..365f89d0a0 100644 --- a/mainboard/adl/Kconfig +++ b/mainboard/adl/Kconfig @@ -1,5 +1,5 @@ ## -## This file is part of the LinuxBIOS project. +## This file is part of the coreboot project. ## ## Copyright (C) 2007 coresystems GmbH ## (Written by Stefan Reinauer for coresystems GmbH) diff --git a/mainboard/adl/msm800sev/Kconfig b/mainboard/adl/msm800sev/Kconfig index 7695ac3e38..0e6870338b 100644 --- a/mainboard/adl/msm800sev/Kconfig +++ b/mainboard/adl/msm800sev/Kconfig @@ -1,5 +1,5 @@ ## -## This file is part of the LinuxBIOS project. +## This file is part of the coreboot project. ## ## Copyright (C) 2007 coresystems GmbH ## (Written by Stefan Reinauer for coresystems GmbH) diff --git a/mainboard/adl/msm800sev/Makefile b/mainboard/adl/msm800sev/Makefile index 55eb337e01..04b597f6c1 100644 --- a/mainboard/adl/msm800sev/Makefile +++ b/mainboard/adl/msm800sev/Makefile @@ -1,5 +1,5 @@ ## -## This file is part of the LinuxBIOS project. +## This file is part of the coreboot project. ## ## Copyright (C) 2006-2007 coresystems GmbH ## (Written by Stefan Reinauer for coresystems GmbH) @@ -28,7 +28,7 @@ INITRAM_OBJ = $(src)/mainboard/$(MAINBOARDDIR)/initram.c \ STAGE2_MAINBOARD_OBJ = -$(obj)/linuxbios.vpd: +$(obj)/coreboot.vpd: $(Q)printf " BUILD DUMMY VPD\n" - $(Q)dd if=/dev/zero of=$(obj)/linuxbios.vpd bs=256 count=1 $(SILENT) + $(Q)dd if=/dev/zero of=$(obj)/coreboot.vpd bs=256 count=1 $(SILENT) diff --git a/mainboard/adl/msm800sev/dts b/mainboard/adl/msm800sev/dts index 0c2f80a97e..966b55bc7b 100644 --- a/mainboard/adl/msm800sev/dts +++ b/mainboard/adl/msm800sev/dts @@ -1,5 +1,5 @@ /* - * This file is part of the LinuxBIOS project. + * This file is part of the coreboot project. * * Copyright (C) 2007 Ronald G. Minnich * Copyright (C) 2007 coresystems GmbH diff --git a/mainboard/adl/msm800sev/initram.c b/mainboard/adl/msm800sev/initram.c index 3f5ab9b7df..dcc2a1da40 100644 --- a/mainboard/adl/msm800sev/initram.c +++ b/mainboard/adl/msm800sev/initram.c @@ -1,5 +1,5 @@ /* - * This file is part of the LinuxBIOS project. + * This file is part of the coreboot project. * * Copyright (C) 2007 Advanced Micro Devices, Inc. * diff --git a/mainboard/adl/msm800sev/stage1.c b/mainboard/adl/msm800sev/stage1.c index a56baa7acb..1c758ae9ce 100644 --- a/mainboard/adl/msm800sev/stage1.c +++ b/mainboard/adl/msm800sev/stage1.c @@ -1,5 +1,5 @@ /* - * This file is part of the LinuxBIOS project. + * This file is part of the coreboot project. * * Copyright (C) 2007 Advanced Micro Devices, Inc. * diff --git a/mainboard/amd/Kconfig b/mainboard/amd/Kconfig index 53d9a285a4..a14bc01adc 100644 --- a/mainboard/amd/Kconfig +++ b/mainboard/amd/Kconfig @@ -1,5 +1,5 @@ ## -## This file is part of the LinuxBIOS project. +## This file is part of the coreboot project. ## ## Copyright (C) 2007 coresystems GmbH ## (Written by Stefan Reinauer for coresystems GmbH) diff --git a/mainboard/amd/norwich/Kconfig b/mainboard/amd/norwich/Kconfig index 1920a50074..5fe1a66b37 100644 --- a/mainboard/amd/norwich/Kconfig +++ b/mainboard/amd/norwich/Kconfig @@ -1,5 +1,5 @@ ## -## This file is part of the LinuxBIOS project. +## This file is part of the coreboot project. ## ## Copyright (C) 2007 coresystems GmbH ## (Written by Stefan Reinauer for coresystems GmbH) diff --git a/mainboard/amd/norwich/Makefile b/mainboard/amd/norwich/Makefile index fba49834f1..a09529617d 100644 --- a/mainboard/amd/norwich/Makefile +++ b/mainboard/amd/norwich/Makefile @@ -1,5 +1,5 @@ ## -## This file is part of the LinuxBIOS project. +## This file is part of the coreboot project. ## ## Copyright (C) 2006-2007 coresystems GmbH ## (Written by Stefan Reinauer for coresystems GmbH) @@ -28,7 +28,7 @@ INITRAM_OBJ = $(src)/mainboard/$(MAINBOARDDIR)/initram.c \ STAGE2_MAINBOARD_OBJ = -$(obj)/linuxbios.vpd: +$(obj)/coreboot.vpd: $(Q)printf " BUILD DUMMY VPD\n" - $(Q)dd if=/dev/zero of=$(obj)/linuxbios.vpd bs=256 count=1 $(SILENT) + $(Q)dd if=/dev/zero of=$(obj)/coreboot.vpd bs=256 count=1 $(SILENT) diff --git a/mainboard/amd/norwich/dts b/mainboard/amd/norwich/dts index ff1f80b6e4..c238cd4381 100644 --- a/mainboard/amd/norwich/dts +++ b/mainboard/amd/norwich/dts @@ -1,5 +1,5 @@ /* - * This file is part of the LinuxBIOS project. + * This file is part of the coreboot project. * * Copyright (C) 2007 Ronald G. Minnich * diff --git a/mainboard/amd/norwich/initram.c b/mainboard/amd/norwich/initram.c index 04d9a4cd11..8587825038 100644 --- a/mainboard/amd/norwich/initram.c +++ b/mainboard/amd/norwich/initram.c @@ -1,5 +1,5 @@ /* - * This file is part of the LinuxBIOS project. + * This file is part of the coreboot project. * * Copyright (C) 2007 Advanced Micro Devices, Inc. * diff --git a/mainboard/amd/norwich/stage1.c b/mainboard/amd/norwich/stage1.c index 0b18b3ad03..3f0724875a 100644 --- a/mainboard/amd/norwich/stage1.c +++ b/mainboard/amd/norwich/stage1.c @@ -1,5 +1,5 @@ /* - * This file is part of the LinuxBIOS project. + * This file is part of the coreboot project. * * Copyright (C) 2007 Advanced Micro Devices, Inc. * diff --git a/mainboard/artecgroup/Kconfig b/mainboard/artecgroup/Kconfig index d8f0e380f7..8fb1ff659a 100644 --- a/mainboard/artecgroup/Kconfig +++ b/mainboard/artecgroup/Kconfig @@ -1,5 +1,5 @@ ## -## This file is part of the LinuxBIOS project. +## This file is part of the coreboot project. ## ## Copyright (C) 2007 coresystems GmbH ## (Written by Stefan Reinauer for coresystems GmbH) diff --git a/mainboard/artecgroup/dbe61/Kconfig b/mainboard/artecgroup/dbe61/Kconfig index 54f89a34d0..33f046e2ac 100644 --- a/mainboard/artecgroup/dbe61/Kconfig +++ b/mainboard/artecgroup/dbe61/Kconfig @@ -1,5 +1,5 @@ ## -## This file is part of the LinuxBIOS project. +## This file is part of the coreboot project. ## ## Copyright (C) 2007 coresystems GmbH ## (Written by Stefan Reinauer for coresystems GmbH) diff --git a/mainboard/artecgroup/dbe61/Makefile b/mainboard/artecgroup/dbe61/Makefile index 4c20b20131..75c1cb6ece 100644 --- a/mainboard/artecgroup/dbe61/Makefile +++ b/mainboard/artecgroup/dbe61/Makefile @@ -1,5 +1,5 @@ ## -## This file is part of the LinuxBIOS project. +## This file is part of the coreboot project. ## ## Copyright (C) 2006-2007 coresystems GmbH ## (Written by Stefan Reinauer for coresystems GmbH) @@ -26,7 +26,7 @@ INITRAM_OBJ = $(src)/mainboard/$(MAINBOARDDIR)/initram.c \ STAGE2_MAINBOARD_OBJ = -$(obj)/linuxbios.vpd: +$(obj)/coreboot.vpd: $(Q)printf " BUILD DUMMY VPD\n" - $(Q)dd if=/dev/zero of=$(obj)/linuxbios.vpd bs=256 count=1 $(SILENT) + $(Q)dd if=/dev/zero of=$(obj)/coreboot.vpd bs=256 count=1 $(SILENT) diff --git a/mainboard/artecgroup/dbe61/dts b/mainboard/artecgroup/dbe61/dts index 8a6a316456..00b4455a6a 100644 --- a/mainboard/artecgroup/dbe61/dts +++ b/mainboard/artecgroup/dbe61/dts @@ -1,5 +1,5 @@ /* - * This file is part of the LinuxBIOS project. + * This file is part of the coreboot project. * * Copyright (C) 2007 Ronald G. Minnich * diff --git a/mainboard/artecgroup/dbe61/initram.c b/mainboard/artecgroup/dbe61/initram.c index 6fa7327334..aacb77532d 100644 --- a/mainboard/artecgroup/dbe61/initram.c +++ b/mainboard/artecgroup/dbe61/initram.c @@ -1,5 +1,5 @@ /* - * This file is part of the LinuxBIOS project. + * This file is part of the coreboot project. * * Copyright (C) 2007 Advanced Micro Devices, Inc. * diff --git a/mainboard/artecgroup/dbe61/stage1.c b/mainboard/artecgroup/dbe61/stage1.c index 1a31409582..600fd868a0 100644 --- a/mainboard/artecgroup/dbe61/stage1.c +++ b/mainboard/artecgroup/dbe61/stage1.c @@ -1,5 +1,5 @@ /* - * This file is part of the LinuxBIOS project. + * This file is part of the coreboot project. * * Copyright (C) 2007 Advanced Micro Devices, Inc. * diff --git a/mainboard/emulation/Kconfig b/mainboard/emulation/Kconfig index de3b6182f9..336062597d 100644 --- a/mainboard/emulation/Kconfig +++ b/mainboard/emulation/Kconfig @@ -1,5 +1,5 @@ ## -## This file is part of the LinuxBIOS project. +## This file is part of the coreboot project. ## ## Copyright (C) 2006 Segher Boessenkool ## Copyright (C) 2006-2007 coresystems GmbH diff --git a/mainboard/emulation/qemu-x86/Kconfig b/mainboard/emulation/qemu-x86/Kconfig index 02a4061b47..040e4086ee 100644 --- a/mainboard/emulation/qemu-x86/Kconfig +++ b/mainboard/emulation/qemu-x86/Kconfig @@ -1,5 +1,5 @@ ## -## This file is part of the LinuxBIOS project. +## This file is part of the coreboot project. ## ## Copyright (C) 2007 coresystems GmbH ## (Written by Stefan Reinauer for coresystems GmbH) diff --git a/mainboard/emulation/qemu-x86/Makefile b/mainboard/emulation/qemu-x86/Makefile index 00018a2372..ea6e93f2d2 100644 --- a/mainboard/emulation/qemu-x86/Makefile +++ b/mainboard/emulation/qemu-x86/Makefile @@ -1,5 +1,5 @@ ## -## This file is part of the LinuxBIOS project. +## This file is part of the coreboot project. ## ## Copyright (C) 2006-2007 coresystems GmbH ## (Written by Stefan Reinauer for coresystems GmbH) @@ -39,7 +39,7 @@ STAGE2_MAINBOARD_OBJ = vga.o # Do we want to put our own stuff there, too? # -$(obj)/linuxbios.vpd: +$(obj)/coreboot.vpd: $(Q)printf " BUILD DUMMY VPD\n" - $(Q)dd if=/dev/zero of=$(obj)/linuxbios.vpd bs=256 count=1 $(SILENT) + $(Q)dd if=/dev/zero of=$(obj)/coreboot.vpd bs=256 count=1 $(SILENT) diff --git a/mainboard/emulation/qemu-x86/dts b/mainboard/emulation/qemu-x86/dts index 721da41e83..3976c60717 100644 --- a/mainboard/emulation/qemu-x86/dts +++ b/mainboard/emulation/qemu-x86/dts @@ -1,5 +1,5 @@ /* - * This file is part of the LinuxBIOS project. + * This file is part of the coreboot project. * * Copyright (C) 2007 Ronald G. Minnich * diff --git a/mainboard/emulation/qemu-x86/initram.c b/mainboard/emulation/qemu-x86/initram.c index 6f32c06ad6..ef43e7d3dd 100644 --- a/mainboard/emulation/qemu-x86/initram.c +++ b/mainboard/emulation/qemu-x86/initram.c @@ -1,5 +1,5 @@ /* - * This file is part of the LinuxBIOS project. + * This file is part of the coreboot project. * * Copyright (C) 2007 Stefan Reinauer * Copyright (C) 2007 Carl-Daniel Hailfinger diff --git a/mainboard/emulation/qemu-x86/initram_printktest.c b/mainboard/emulation/qemu-x86/initram_printktest.c index a2d22e49e4..34da9035cf 100644 --- a/mainboard/emulation/qemu-x86/initram_printktest.c +++ b/mainboard/emulation/qemu-x86/initram_printktest.c @@ -1,5 +1,5 @@ /* - * This file is part of the LinuxBIOS project. + * This file is part of the coreboot project. * * Copyright (C) 2007 Carl-Daniel Hailfinger * diff --git a/mainboard/emulation/qemu-x86/stage1.c b/mainboard/emulation/qemu-x86/stage1.c index eba0969cf8..225363b79f 100644 --- a/mainboard/emulation/qemu-x86/stage1.c +++ b/mainboard/emulation/qemu-x86/stage1.c @@ -1,5 +1,5 @@ /* - * This file is part of the LinuxBIOS project. + * This file is part of the coreboot project. * * Copyright (C) 2007 Ronald G. Minnich * diff --git a/mainboard/emulation/qemu-x86/vga.c b/mainboard/emulation/qemu-x86/vga.c index f654a6a5fc..ed03039d9b 100644 --- a/mainboard/emulation/qemu-x86/vga.c +++ b/mainboard/emulation/qemu-x86/vga.c @@ -1,5 +1,5 @@ /* - * This file is part of the LinuxBIOS project. + * This file is part of the coreboot project. * * Copyright (C) 2007 coresystems GmbH * (Written by Stefan Reinauer for coresystems GmbH) diff --git a/mainboard/pcengines/Kconfig b/mainboard/pcengines/Kconfig index e9a4154e12..63d046bc25 100644 --- a/mainboard/pcengines/Kconfig +++ b/mainboard/pcengines/Kconfig @@ -1,5 +1,5 @@ ## -## This file is part of the LinuxBIOS project. +## This file is part of the coreboot project. ## ## Copyright (C) 2007 coresystems GmbH ## (Written by Stefan Reinauer for coresystems GmbH) diff --git a/mainboard/pcengines/alix1c/Kconfig b/mainboard/pcengines/alix1c/Kconfig index 66b2833a58..d145c16b57 100644 --- a/mainboard/pcengines/alix1c/Kconfig +++ b/mainboard/pcengines/alix1c/Kconfig @@ -1,5 +1,5 @@ ## -## This file is part of the LinuxBIOS project. +## This file is part of the coreboot project. ## ## Copyright (C) 2007 coresystems GmbH ## (Written by Stefan Reinauer for coresystems GmbH) diff --git a/mainboard/pcengines/alix1c/Makefile b/mainboard/pcengines/alix1c/Makefile index 7e235327a8..da4c25a6c6 100644 --- a/mainboard/pcengines/alix1c/Makefile +++ b/mainboard/pcengines/alix1c/Makefile @@ -1,5 +1,5 @@ ## -## This file is part of the LinuxBIOS project. +## This file is part of the coreboot project. ## ## Copyright (C) 2006-2007 coresystems GmbH ## (Written by Stefan Reinauer for coresystems GmbH) @@ -27,7 +27,7 @@ INITRAM_OBJ = $(src)/mainboard/$(MAINBOARDDIR)/initram.c \ STAGE2_MAINBOARD_OBJ = -$(obj)/linuxbios.vpd: +$(obj)/coreboot.vpd: $(Q)printf " BUILD DUMMY VPD\n" - $(Q)dd if=/dev/zero of=$(obj)/linuxbios.vpd bs=256 count=1 $(SILENT) + $(Q)dd if=/dev/zero of=$(obj)/coreboot.vpd bs=256 count=1 $(SILENT) diff --git a/mainboard/pcengines/alix1c/dts b/mainboard/pcengines/alix1c/dts index 3e7491eb0f..2d3403ae99 100644 --- a/mainboard/pcengines/alix1c/dts +++ b/mainboard/pcengines/alix1c/dts @@ -1,5 +1,5 @@ /* - * This file is part of the LinuxBIOS project. + * This file is part of the coreboot project. * * Copyright (C) 2007 Ronald G. Minnich * diff --git a/mainboard/pcengines/alix1c/initram.c b/mainboard/pcengines/alix1c/initram.c index 82380596f5..52febc596a 100644 --- a/mainboard/pcengines/alix1c/initram.c +++ b/mainboard/pcengines/alix1c/initram.c @@ -1,5 +1,5 @@ /* - * This file is part of the LinuxBIOS project. + * This file is part of the coreboot project. * * Copyright (C) 2007 Advanced Micro Devices, Inc. * diff --git a/mainboard/pcengines/alix1c/stage1.c b/mainboard/pcengines/alix1c/stage1.c index 39f10c7356..3ad14f3a78 100644 --- a/mainboard/pcengines/alix1c/stage1.c +++ b/mainboard/pcengines/alix1c/stage1.c @@ -1,5 +1,5 @@ /* - * This file is part of the LinuxBIOS project. + * This file is part of the coreboot project. * * Copyright (C) 2007 Advanced Micro Devices, Inc. * diff --git a/northbridge/amd/geodelx/Makefile b/northbridge/amd/geodelx/Makefile index af1bf63216..73eb65617f 100644 --- a/northbridge/amd/geodelx/Makefile +++ b/northbridge/amd/geodelx/Makefile @@ -1,5 +1,5 @@ ## -## This file is part of the LinuxBIOS project. +## This file is part of the coreboot project. ## ## Copyright (C) 2007 coresystems GmbH ## (Written by Stefan Reinauer for coresystems GmbH) diff --git a/northbridge/amd/geodelx/dts b/northbridge/amd/geodelx/dts index 3d86fb0add..9b7540ea43 100644 --- a/northbridge/amd/geodelx/dts +++ b/northbridge/amd/geodelx/dts @@ -1,5 +1,5 @@ /* - * This file is part of the LinuxBIOS project. + * This file is part of the coreboot project. * * Copyright (C) 2008 Ronald G. Minnich * diff --git a/northbridge/amd/geodelx/geodelx.c b/northbridge/amd/geodelx/geodelx.c index 8d6c0a04ae..f5a2590d10 100644 --- a/northbridge/amd/geodelx/geodelx.c +++ b/northbridge/amd/geodelx/geodelx.c @@ -1,5 +1,5 @@ /* - * This file is part of the LinuxBIOS project. + * This file is part of the coreboot project. * * Copyright (C) 2007 Advanced Micro Devices, Inc. * diff --git a/northbridge/amd/geodelx/geodelxinit.c b/northbridge/amd/geodelx/geodelxinit.c index aeb9f1dd3a..d3295885e8 100644 --- a/northbridge/amd/geodelx/geodelxinit.c +++ b/northbridge/amd/geodelx/geodelxinit.c @@ -1,5 +1,5 @@ /* - * This file is part of the LinuxBIOS project. + * This file is part of the coreboot project. * * Copyright (C) 2007 Advanced Micro Devices, Inc. * diff --git a/northbridge/amd/geodelx/raminit.c b/northbridge/amd/geodelx/raminit.c index b3c21ef9ad..97127fb608 100644 --- a/northbridge/amd/geodelx/raminit.c +++ b/northbridge/amd/geodelx/raminit.c @@ -1,5 +1,5 @@ /* - * This file is part of the LinuxBIOS project. + * This file is part of the coreboot project. * * Copyright (C) 2007 Advanced Micro Devices, Inc. * diff --git a/northbridge/amd/geodelx/raminit.h b/northbridge/amd/geodelx/raminit.h index a5c750b344..d1c24f3a49 100644 --- a/northbridge/amd/geodelx/raminit.h +++ b/northbridge/amd/geodelx/raminit.h @@ -1,5 +1,5 @@ /* - * This file is part of the LinuxBIOS project. + * This file is part of the coreboot project. * * Copyright (C) 2007 Advanced Micro Devices, Inc. * diff --git a/northbridge/intel/i440bxemulation/Kconfig b/northbridge/intel/i440bxemulation/Kconfig index 18f7a011e3..68ba1324b2 100644 --- a/northbridge/intel/i440bxemulation/Kconfig +++ b/northbridge/intel/i440bxemulation/Kconfig @@ -1,5 +1,5 @@ ## -## This file is part of the LinuxBIOS project. +## This file is part of the coreboot project. ## ## Copyright (C) 2007 Ronald G. Minnich ## Copyright (C) 2007 Uwe Hermann diff --git a/northbridge/intel/i440bxemulation/Makefile b/northbridge/intel/i440bxemulation/Makefile index b23ebd714f..5997e7311f 100644 --- a/northbridge/intel/i440bxemulation/Makefile +++ b/northbridge/intel/i440bxemulation/Makefile @@ -1,5 +1,5 @@ ## -## This file is part of the LinuxBIOS project. +## This file is part of the coreboot project. ## ## Copyright (C) 2006-2007 coresystems GmbH ## (Written by Stefan Reinauer for coresystems GmbH) diff --git a/northbridge/intel/i440bxemulation/dts b/northbridge/intel/i440bxemulation/dts index cc5003f11d..161621161d 100644 --- a/northbridge/intel/i440bxemulation/dts +++ b/northbridge/intel/i440bxemulation/dts @@ -1,5 +1,5 @@ /* - * This file is part of the LinuxBIOS project. + * This file is part of the coreboot project. * * Copyright (C) 2007 Ronald G. Minnich * diff --git a/northbridge/intel/i440bxemulation/i440bx.c b/northbridge/intel/i440bxemulation/i440bx.c index e78458b44a..0fe5bd9d70 100644 --- a/northbridge/intel/i440bxemulation/i440bx.c +++ b/northbridge/intel/i440bxemulation/i440bx.c @@ -1,5 +1,5 @@ /* - * This file is part of the LinuxBIOS project. + * This file is part of the coreboot project. * * Copyright (C) 2000 Ron Minnich, Advanced Computing Lab, LANL * Copyright (C) 2007 Ronald G. Minnich diff --git a/northbridge/intel/i440bxemulation/i440bx.h b/northbridge/intel/i440bxemulation/i440bx.h index 3f9f121cb0..15e4ebf77e 100644 --- a/northbridge/intel/i440bxemulation/i440bx.h +++ b/northbridge/intel/i440bxemulation/i440bx.h @@ -1,5 +1,5 @@ /* - * This file is part of the LinuxBIOS project. + * This file is part of the coreboot project. * * Copyright (C) 2006 Uwe Hermann * diff --git a/southbridge/amd/cs5536/Makefile b/southbridge/amd/cs5536/Makefile index 8d7b9500c9..54d3dd5326 100644 --- a/southbridge/amd/cs5536/Makefile +++ b/southbridge/amd/cs5536/Makefile @@ -1,5 +1,5 @@ ## -## This file is part of the LinuxBIOS project. +## This file is part of the coreboot project. ## ## Copyright (C) 2007 coresystems GmbH ## (Written by Stefan Reinauer for coresystems GmbH) diff --git a/southbridge/amd/cs5536/cs5536.c b/southbridge/amd/cs5536/cs5536.c index 29c7e0a384..441e7601a7 100644 --- a/southbridge/amd/cs5536/cs5536.c +++ b/southbridge/amd/cs5536/cs5536.c @@ -1,5 +1,5 @@ /* - * This file is part of the LinuxBIOS project. + * This file is part of the coreboot project. * * Copyright (C) 2007 Advanced Micro Devices, Inc. * diff --git a/southbridge/amd/cs5536/cs5536.h b/southbridge/amd/cs5536/cs5536.h index 9fd8785fae..a22fe36850 100644 --- a/southbridge/amd/cs5536/cs5536.h +++ b/southbridge/amd/cs5536/cs5536.h @@ -1,5 +1,5 @@ /* - * This file is part of the LinuxBIOS project. + * This file is part of the coreboot project. * * Copyright (C) 2007 Advanced Micro Devices, Inc. * diff --git a/southbridge/amd/cs5536/dts b/southbridge/amd/cs5536/dts index 3082fad265..e1c8c29971 100644 --- a/southbridge/amd/cs5536/dts +++ b/southbridge/amd/cs5536/dts @@ -1,5 +1,5 @@ /* - * This file is part of the LinuxBIOS project. + * This file is part of the coreboot project. * * Copyright (C) 2007 Ronald G. Minnich * diff --git a/southbridge/amd/cs5536/smbus_initram.c b/southbridge/amd/cs5536/smbus_initram.c index 9912c91057..8e65325585 100644 --- a/southbridge/amd/cs5536/smbus_initram.c +++ b/southbridge/amd/cs5536/smbus_initram.c @@ -1,5 +1,5 @@ /* - * This file is part of the LinuxBIOS project. + * This file is part of the coreboot project. * * Copyright (C) 2007 Advanced Micro Devices, Inc. * diff --git a/southbridge/amd/cs5536/stage1.c b/southbridge/amd/cs5536/stage1.c index a3e50bae43..60932540f4 100644 --- a/southbridge/amd/cs5536/stage1.c +++ b/southbridge/amd/cs5536/stage1.c @@ -1,5 +1,5 @@ /* - * This file is part of the LinuxBIOS project. + * This file is part of the coreboot project. * * Copyright (C) 2007 Advanced Micro Devices, Inc. * diff --git a/southbridge/intel/i82371eb/Makefile b/southbridge/intel/i82371eb/Makefile index 5916961a43..37d6db8865 100644 --- a/southbridge/intel/i82371eb/Makefile +++ b/southbridge/intel/i82371eb/Makefile @@ -1,5 +1,5 @@ ## -## This file is part of the LinuxBIOS project. +## This file is part of the coreboot project. ## ## Copyright (C) 2007 Ronald G. Minnich ## diff --git a/southbridge/intel/i82371eb/dts b/southbridge/intel/i82371eb/dts index e7f7e47293..7900eacc58 100644 --- a/southbridge/intel/i82371eb/dts +++ b/southbridge/intel/i82371eb/dts @@ -1,5 +1,5 @@ /* - * This file is part of the LinuxBIOS project. + * This file is part of the coreboot project. * * Copyright (C) 2007 Ronald G. Minnich * diff --git a/southbridge/intel/i82371eb/i82371eb.c b/southbridge/intel/i82371eb/i82371eb.c index ea6b688b35..579a7605c7 100644 --- a/southbridge/intel/i82371eb/i82371eb.c +++ b/southbridge/intel/i82371eb/i82371eb.c @@ -1,5 +1,5 @@ /* - * This file is part of the LinuxBIOS project. + * This file is part of the coreboot project. * * Copyright (C) 2004 Linux Networx * Copyright (C) 2005 Bitworks diff --git a/superio/fintek/f71805f/Makefile b/superio/fintek/f71805f/Makefile index 916c3046b4..6312c87562 100644 --- a/superio/fintek/f71805f/Makefile +++ b/superio/fintek/f71805f/Makefile @@ -1,5 +1,5 @@ ## -## This file is part of the LinuxBIOS project. +## This file is part of the coreboot project. ## ## Copyright (C) 2007 Corey Osgood ## diff --git a/superio/fintek/f71805f/dts b/superio/fintek/f71805f/dts index 943c64215a..b1958a6292 100644 --- a/superio/fintek/f71805f/dts +++ b/superio/fintek/f71805f/dts @@ -1,5 +1,5 @@ /* - * This file is part of the LinuxBIOS project. + * This file is part of the coreboot project. * * Copyright (C) 2007 Corey Osgood * diff --git a/superio/fintek/f71805f/f71805f.h b/superio/fintek/f71805f/f71805f.h index 48a33a3f07..75dae059e6 100644 --- a/superio/fintek/f71805f/f71805f.h +++ b/superio/fintek/f71805f/f71805f.h @@ -1,5 +1,5 @@ /* - * This file is part of the LinuxBIOS project. + * This file is part of the coreboot project. * * Copyright (C) 2007 Corey Osgood * diff --git a/superio/fintek/f71805f/stage1.c b/superio/fintek/f71805f/stage1.c index e15fed1e6e..a9f681656c 100644 --- a/superio/fintek/f71805f/stage1.c +++ b/superio/fintek/f71805f/stage1.c @@ -1,5 +1,5 @@ /* - * This file is part of the LinuxBIOS project. + * This file is part of the coreboot project. * * Copyright 2007 Corey Osgood * diff --git a/superio/fintek/f71805f/superio.c b/superio/fintek/f71805f/superio.c index 71ee13e2a8..2598b20a91 100644 --- a/superio/fintek/f71805f/superio.c +++ b/superio/fintek/f71805f/superio.c @@ -1,5 +1,5 @@ /* - * This file is part of the LinuxBIOS project. + * This file is part of the coreboot project. * * Copyright 2007 Corey Osgood * diff --git a/superio/winbond/w83627hf/Makefile b/superio/winbond/w83627hf/Makefile index c20198deec..aae1efef59 100644 --- a/superio/winbond/w83627hf/Makefile +++ b/superio/winbond/w83627hf/Makefile @@ -1,5 +1,5 @@ ## -## This file is part of the LinuxBIOS project. +## This file is part of the coreboot project. ## ## Copyright (C) 2007 coresystems GmbH ## (Written by Stefan Reinauer for coresystems GmbH) diff --git a/superio/winbond/w83627hf/dts b/superio/winbond/w83627hf/dts index 907390b53d..ec3b19b2b8 100644 --- a/superio/winbond/w83627hf/dts +++ b/superio/winbond/w83627hf/dts @@ -1,5 +1,5 @@ /* - * This file is part of the LinuxBIOS project. + * This file is part of the coreboot project. * * Copyright (C) 2007 Ronald G. Minnich * diff --git a/superio/winbond/w83627hf/stage1.c b/superio/winbond/w83627hf/stage1.c index 892922ec15..90b54199d1 100644 --- a/superio/winbond/w83627hf/stage1.c +++ b/superio/winbond/w83627hf/stage1.c @@ -1,5 +1,5 @@ /* - * This file is part of the LinuxBIOS project. + * This file is part of the coreboot project. * * Copyright 2007 Ronald G. Minnich * diff --git a/superio/winbond/w83627hf/superio.c b/superio/winbond/w83627hf/superio.c index 5cacb8e0b4..544da16b43 100644 --- a/superio/winbond/w83627hf/superio.c +++ b/superio/winbond/w83627hf/superio.c @@ -1,5 +1,5 @@ /* - * This file is part of the LinuxBIOS project. + * This file is part of the coreboot project. * * Copyright 2000 AG Electronics Ltd. * Copyright 2003-2004 Linux Networx diff --git a/superio/winbond/w83627hf/w83627hf.h b/superio/winbond/w83627hf/w83627hf.h index bf1036420b..c83208884a 100644 --- a/superio/winbond/w83627hf/w83627hf.h +++ b/superio/winbond/w83627hf/w83627hf.h @@ -1,5 +1,5 @@ /* - * This file is part of the LinuxBIOS project. + * This file is part of the coreboot project. * * Copyright 2007 Ronald G. Minnich * diff --git a/util/Makefile b/util/Makefile index 4d614ac46d..36e7d8588c 100644 --- a/util/Makefile +++ b/util/Makefile @@ -1,5 +1,5 @@ ## -## This file is part of the LinuxBIOS project. +## This file is part of the coreboot project. ## ## Copyright (C) 2007 coresystems GmbH ## (Written by Stefan Reinauer for coresystems GmbH) @@ -24,12 +24,12 @@ include util/dtc/Makefile include util/kconfig/Makefile include util/options/Makefile -# Parts used by LinuxBIOS. +# Parts used by coreboot. include util/x86emu/Makefile # Compressors. include util/lzma/Makefile include util/nrv2b/Makefile -# LinuxBIOS archiver +# coreboot lightweight archiver include util/lar/Makefile diff --git a/util/doxygen/Doxyfile.LinuxBIOS b/util/doxygen/Doxyfile.LinuxBIOS index cb0de473fc..41a095ad02 100644 --- a/util/doxygen/Doxyfile.LinuxBIOS +++ b/util/doxygen/Doxyfile.LinuxBIOS @@ -17,7 +17,7 @@ # The PROJECT_NAME tag is a single word (or a sequence of words surrounded # by quotes) that should identify the project. -PROJECT_NAME = LinuxBIOS +PROJECT_NAME = coreboot # The PROJECT_NUMBER tag can be used to enter a project or revision number. # This could be handy for archiving the generated documentation or diff --git a/util/dtc/dtc.c b/util/dtc/dtc.c index 95525b2173..14d4d895d7 100644 --- a/util/dtc/dtc.c +++ b/util/dtc/dtc.c @@ -91,7 +91,7 @@ static void usage(void) fprintf(stderr, "\t\t\tdts - device tree source text\n"); fprintf(stderr, "\t\t\tdtb - device tree blob\n"); fprintf(stderr, "\t\t\tasm - assembler source\n"); - fprintf(stderr, "\t\t\tlinuxbios (or just lb) - linuxbios source\n"); + fprintf(stderr, "\t\t\tcoreboot (or just lb) - coreboot source\n"); fprintf(stderr, "\t-V \n"); fprintf(stderr, "\t\tBlob version to produce, defaults to 3 (relevant for dtb\n\t\tand asm output only)\n"); fprintf(stderr, "\t-R \n"); @@ -199,10 +199,10 @@ int main(int argc, char *argv[]) dt_to_asm(outf, bi, outversion, boot_cpuid_phys); } else if (streq(outform, "C")) { dt_to_C(outf, bi, outversion, boot_cpuid_phys); - } else if (streq(outform, "linuxbios") || streq(outform, "lb")) { - dt_to_linuxbios(outf, bi, outversion, boot_cpuid_phys); - } else if (streq(outform, "linuxbiosinclude") || streq(outform, "lbh")) { - dt_to_linuxbiosh(outf, bi, outversion, boot_cpuid_phys); + } else if (streq(outform, "coreboot") || streq(outform, "lb")) { + dt_to_coreboot(outf, bi, outversion, boot_cpuid_phys); + } else if (streq(outform, "corebootinclude") || streq(outform, "lbh")) { + dt_to_corebooth(outf, bi, outversion, boot_cpuid_phys); } else if (streq(outform, "null")) { /* do nothing */ } else { diff --git a/util/dtc/dtc.h b/util/dtc/dtc.h index a375ff8bcb..528877f212 100644 --- a/util/dtc/dtc.h +++ b/util/dtc/dtc.h @@ -218,8 +218,8 @@ void dt_to_blob(FILE *f, struct boot_info *bi, int version, void dt_to_asm(FILE *f, struct boot_info *bi, int version, int boot_cpuid_phys); void dt_to_C(FILE *f, struct boot_info *bi, int version, int boot_cpuid_phys); -void dt_to_linuxbios(FILE *f, struct boot_info *bi, int version, int boot_cpuid_phys); -void dt_to_linuxbiosh(FILE *f, struct boot_info *bi, int version, int boot_cpuid_phys); +void dt_to_coreboot(FILE *f, struct boot_info *bi, int version, int boot_cpuid_phys); +void dt_to_corebooth(FILE *f, struct boot_info *bi, int version, int boot_cpuid_phys); struct boot_info *dt_from_blob(FILE *f); diff --git a/util/dtc/endian.h b/util/dtc/endian.h index f6adeddf84..b0b8fe672f 100644 --- a/util/dtc/endian.h +++ b/util/dtc/endian.h @@ -2,7 +2,7 @@ #define _OSDEP_ENDIAN_H /* - * This file is part of the LinuxBIOS project. + * This file is part of the coreboot project. * * Copyright (C) 2006 Michael Niedermayer * Copyright (C) 2007 Patrick Georgi diff --git a/util/dtc/flattree.c b/util/dtc/flattree.c index 8243454f26..0640e05e59 100644 --- a/util/dtc/flattree.c +++ b/util/dtc/flattree.c @@ -405,16 +405,16 @@ static struct emitter C_emitter = { }; -/* LinuxBIOS static.c */ +/* coreboot static.c */ -static void linuxbios_emit_cell(void *e, cell_t val) +static void coreboot_emit_cell(void *e, cell_t val) { FILE *f = e; fprintf(f, "\tu32\tc%d = 0x%x;\n", unique++, val); } -static void linuxbios_emit_string(void *e, char *str, int len) +static void coreboot_emit_string(void *e, char *str, int len) { FILE *f = e; char c = 0; @@ -432,14 +432,14 @@ static void linuxbios_emit_string(void *e, char *str, int len) } } -static void linuxbios_emit_align(void *e, int a) +static void coreboot_emit_align(void *e, int a) { FILE *f = e; fprintf(f, "\tALIGN(x)\t%d\n", a); } -static void linuxbios_emit_data(void *e, struct property *p) +static void coreboot_emit_data(void *e, struct property *p) { struct data d = p->val; FILE *f = e; @@ -465,7 +465,7 @@ static void linuxbios_emit_data(void *e, struct property *p) #endif } -static void linuxbios_emit_beginnode(void *e, char *label) +static void coreboot_emit_beginnode(void *e, char *label) { FILE *f = e; @@ -474,7 +474,7 @@ static void linuxbios_emit_beginnode(void *e, char *label) } } -static void linuxbios_emit_endnode(void *e, char *label) +static void coreboot_emit_endnode(void *e, char *label) { FILE *f = e; @@ -483,8 +483,8 @@ static void linuxbios_emit_endnode(void *e, char *label) } } -#ifdef LINUXBIOS_OUTPUT -static void linuxbios_emit_struct_start(void *e, char *prefix, char *label) +#ifdef COREBOOT_OUTPUT +static void coreboot_emit_struct_start(void *e, char *prefix, char *label) { FILE *f = e; @@ -493,7 +493,7 @@ static void linuxbios_emit_struct_start(void *e, char *prefix, char *label) } } -static void linuxbios_emit_struct_end(void *e, char *prefix, char *label) +static void coreboot_emit_struct_end(void *e, char *prefix, char *label) { FILE *f = e; @@ -504,7 +504,7 @@ static void linuxbios_emit_struct_end(void *e, char *prefix, char *label) #endif -static void linuxbios_emit_property(void *e, char *label) +static void coreboot_emit_property(void *e, char *label) { FILE *f = e; @@ -514,7 +514,7 @@ static void linuxbios_emit_property(void *e, char *label) fprintf(f, "\tu32 p%d = \tOF_DT_PROP;\n", unique++); } -static void linuxbios_emit_special(FILE *e, struct node *tree) +static void coreboot_emit_special(FILE *e, struct node *tree) { FILE *f = e; struct property *prop; @@ -634,15 +634,15 @@ static void linuxbios_emit_special(FILE *e, struct node *tree) fprintf(f, "};\n"); } -static struct emitter linuxbios_emitter = { - .cell = linuxbios_emit_cell, - .string = linuxbios_emit_string, - .align = linuxbios_emit_align, - .data = linuxbios_emit_data, - .beginnode = linuxbios_emit_beginnode, - .endnode = linuxbios_emit_endnode, - .property = linuxbios_emit_property, - .special = linuxbios_emit_special, +static struct emitter coreboot_emitter = { + .cell = coreboot_emit_cell, + .string = coreboot_emit_string, + .align = coreboot_emit_align, + .data = coreboot_emit_data, + .beginnode = coreboot_emit_beginnode, + .endnode = coreboot_emit_endnode, + .property = coreboot_emit_property, + .special = coreboot_emit_special, }; @@ -1279,7 +1279,7 @@ void fix_next(struct node *root){ first_node = root; } -void dt_to_linuxbios(FILE *f, struct boot_info *bi, int version, int boot_cpuid_phys) +void dt_to_coreboot(FILE *f, struct boot_info *bi, int version, int boot_cpuid_phys) { struct property *prop; struct version_info *vi = NULL; @@ -1339,16 +1339,16 @@ void dt_to_linuxbios(FILE *f, struct boot_info *bi, int version, int boot_cpuid_ /* emit the code, if any */ if (code) fprintf(f, "%s\n", code); - flatten_tree_emit_structinits(bi->dt, &linuxbios_emitter, f, &strbuf, vi); + flatten_tree_emit_structinits(bi->dt, &coreboot_emitter, f, &strbuf, vi); fprintf(f, "struct constructor *all_constructors[] = {\n"); - flatten_tree_emit_constructors(bi->dt, &linuxbios_emitter, f, &strbuf, vi); + flatten_tree_emit_constructors(bi->dt, &coreboot_emitter, f, &strbuf, vi); fprintf(f, "\t0\n};\n"); data_free(strbuf); /* */ } -void dt_to_linuxbiosh(FILE *f, struct boot_info *bi, int version, int boot_cpuid_phys) +void dt_to_corebooth(FILE *f, struct boot_info *bi, int version, int boot_cpuid_phys) { struct version_info *vi = NULL; int i; @@ -1377,9 +1377,9 @@ void dt_to_linuxbiosh(FILE *f, struct boot_info *bi, int version, int boot_cpuid /* emit any includes that we need -- TODO: ONLY ONCE PER TYPE*/ fprintf(f, "#include \n#include \n"); fprintf(f, "extern const char *mainboard_vendor, *mainboard_part_number;\n"); - flatten_tree_emit_includes(bi->dt, &linuxbios_emitter, f, &strbuf, vi); + flatten_tree_emit_includes(bi->dt, &coreboot_emitter, f, &strbuf, vi); - flatten_tree_emit_structdecls(bi->dt, &linuxbios_emitter, f, &strbuf, vi); + flatten_tree_emit_structdecls(bi->dt, &coreboot_emitter, f, &strbuf, vi); /* */ } diff --git a/util/kconfig/confdata.c b/util/kconfig/confdata.c index 1eda235d1b..dc1d5128e7 100644 --- a/util/kconfig/confdata.c +++ b/util/kconfig/confdata.c @@ -381,7 +381,7 @@ int conf_write(const char *name) fprintf(out, _("#\n" "# Automatically generated make config: don't edit\n" - "# LinuxBIOS version: %s\n" + "# coreboot version: %s\n" "%s%s" "#\n"), sym_get_string_value(sym), @@ -390,7 +390,7 @@ int conf_write(const char *name) if (out_h) fprintf(out_h, "/*\n" " * Automatically generated C config: don't edit\n" - " * LinuxBIOS version: %s\n" + " * coreboot version: %s\n" "%s%s" " */\n" "#define AUTOCONF_INCLUDED\n", @@ -508,7 +508,7 @@ int conf_write(const char *name) fclose(out); if (out_h) { fclose(out_h); - rename(".tmpconfig.h", "include/linuxbios/autoconf.h"); + rename(".tmpconfig.h", "include/coreboot/autoconf.h"); file_write_dep(NULL); } if (!name || basename != conf_def_filename) { diff --git a/util/kconfig/gconf.c b/util/kconfig/gconf.c index 4af2cee8b4..77984b4659 100644 --- a/util/kconfig/gconf.c +++ b/util/kconfig/gconf.c @@ -275,7 +275,7 @@ void init_main_window(const gchar * glade_file) /*"style", PANGO_STYLE_OBLIQUE, */ NULL); - sprintf(title, _("LinuxBIOS v%s Configuration"), + sprintf(title, _("coreboot v%s configuration"), getenv("KERNELVERSION")); gtk_window_set_title(GTK_WINDOW(main_wnd), title); @@ -742,7 +742,7 @@ void on_introduction1_activate(GtkMenuItem * menuitem, gpointer user_data) GtkWidget *dialog; const gchar *intro_text = _( "Welcome to gkc, the GTK+ graphical kernel configuration tool\n" - "for LinuxBIOS.\n" + "for coreboot.\n" "For each option, a blank box indicates the feature is disabled, a\n" "check indicates it is enabled, and a dot indicates that it is to\n" "be compiled as a module. Clicking on the box will cycle through the three states.\n" diff --git a/util/kconfig/mconf.c b/util/kconfig/mconf.c index 6020231923..1eafdaa04a 100644 --- a/util/kconfig/mconf.c +++ b/util/kconfig/mconf.c @@ -1055,7 +1055,7 @@ int main(int ac, char **av) sym = sym_lookup("KERNELVERSION", 0); sym_calc_value(sym); - sprintf(menu_backtitle, _("LinuxBIOS v%s Configuration"), + sprintf(menu_backtitle, _("coreboot v%s configuration"), sym_get_string_value(sym)); mode = getenv("MENUCONFIG_MODE"); @@ -1089,7 +1089,7 @@ int main(int ac, char **av) return 1; } printf(_("\n\n" - "*** End of LinuxBIOS configuration.\n" + "*** End of coreboot configuration.\n" "*** Execute 'make' to build the firmware or try 'make help'." "\n\n")); } else { diff --git a/util/kconfig/util.c b/util/kconfig/util.c index 64484d4c16..d1a93f2b42 100644 --- a/util/kconfig/util.c +++ b/util/kconfig/util.c @@ -44,7 +44,7 @@ int file_write_dep(const char *name) else fprintf(out, "\t%s\n", file->name); } - fprintf(out, "\n.config $(objtree)/include/linuxbios/autoconf.h: $(deps_config)\n\n$(deps_config):\n"); + fprintf(out, "\n.config $(objtree)/include/coreboot/autoconf.h: $(deps_config)\n\n$(deps_config):\n"); fclose(out); rename("..config.tmp", name); return 0; diff --git a/util/kconfig/zconf.tab.c_shipped b/util/kconfig/zconf.tab.c_shipped index f6f491f344..9b39c300bc 100644 --- a/util/kconfig/zconf.tab.c_shipped +++ b/util/kconfig/zconf.tab.c_shipped @@ -1949,7 +1949,7 @@ void conf_parse(const char *name) sym_init(); menu_init(); modules_sym = sym_lookup("MODULES", 0); - rootmenu.prompt = menu_add_prompt(P_MENU, "LinuxBIOS Configuration", NULL); + rootmenu.prompt = menu_add_prompt(P_MENU, "coreboot configuration", NULL); #if YYDEBUG if (getenv("ZCONF_DEBUG")) diff --git a/util/kconfig/zconf.y b/util/kconfig/zconf.y index ed05caf6b1..91e57432cd 100644 --- a/util/kconfig/zconf.y +++ b/util/kconfig/zconf.y @@ -459,7 +459,7 @@ void conf_parse(const char *name) sym_init(); menu_init(); modules_sym = sym_lookup("MODULES", 0); - rootmenu.prompt = menu_add_prompt(P_MENU, "LinuxBIOS Configuration", NULL); + rootmenu.prompt = menu_add_prompt(P_MENU, "coreboot configuration", NULL); #if YYDEBUG if (getenv("ZCONF_DEBUG")) diff --git a/util/lar/Makefile b/util/lar/Makefile index c353f96a36..6aef6e4561 100644 --- a/util/lar/Makefile +++ b/util/lar/Makefile @@ -1,7 +1,7 @@ ## -## lar - LinuxBIOS archiver +## lar - lightweight archiver ## -## Copyright (C) 2006-2007 coresystems GmbH +## Copyright (C) 2006-2008 coresystems GmbH ## (Written by Stefan Reinauer for coresystems GmbH) ## ## This program is free software; you can redistribute it and/or modify @@ -61,9 +61,9 @@ tree: $(Q)mkdir -p tree/normal $(Q)mkdir -p tree/fallback $(Q)dd if=/dev/urandom of=tree/compression/lzma bs=1k count=8 &>/dev/null - $(Q)dd if=/dev/urandom of=tree/normal/linuxbios.elf.lzma bs=1k count=32 &>/dev/null + $(Q)dd if=/dev/urandom of=tree/normal/coreboot.elf.lzma bs=1k count=32 &>/dev/null $(Q)dd if=/dev/urandom of=tree/normal/initmem bs=1k count=16 &>/dev/null - $(Q)dd if=/dev/urandom of=tree/fallback/linuxbios.elf.lzma bs=1k count=32 &>/dev/null + $(Q)dd if=/dev/urandom of=tree/fallback/coreboot.elf.lzma bs=1k count=32 &>/dev/null $(Q)dd if=/dev/urandom of=tree/fallback/initmem bs=1k count=16 &>/dev/null $(Q)printf "done.\n" diff --git a/util/lar/README b/util/lar/README index 0e459e9f4f..39dc537506 100644 --- a/util/lar/README +++ b/util/lar/README @@ -1,4 +1,4 @@ -LinuxBIOS Archiver: lar +Lightweight Archiver: lar ----------------------- Table of Contents @@ -12,7 +12,8 @@ Table of Contents Introduction ------------ -This is a simple archiver, similar to cpio, ar or tar. +This is a simple archiver, similar to cpio, ar or tar. It was designed and +written for coreboot. Design goals were - minimum overhead diff --git a/util/lar/bootblock.c b/util/lar/bootblock.c index 9bba8683dd..6b3ac48dc3 100644 --- a/util/lar/bootblock.c +++ b/util/lar/bootblock.c @@ -1,5 +1,5 @@ /* - * lar - LinuxBIOS archiver + * lar - lightweight archiver * * Copyright (C) 2007 coresystems GmbH * (Written by Stefan Reinauer for coresystems GmbH) diff --git a/util/lar/example.c b/util/lar/example.c index c0a89a401b..15fa40d0e1 100644 --- a/util/lar/example.c +++ b/util/lar/example.c @@ -1,5 +1,5 @@ /* - * lar - LinuxBIOS archiver + * lar - lightweight archiver * * Copyright (C) 2006-2007 coresystems GmbH * (Written by Stefan Reinauer for coresystems GmbH) diff --git a/util/lar/lar.c b/util/lar/lar.c index dbe04dd1f2..86a30317b7 100644 --- a/util/lar/lar.c +++ b/util/lar/lar.c @@ -1,7 +1,7 @@ /* - * lar - LinuxBIOS archiver + * lar - lightweight archiver * - * Copyright (C) 2006-2007 coresystems GmbH + * Copyright (C) 2006-2008 coresystems GmbH * (Written by Stefan Reinauer for coresystems GmbH) * * This program is free software; you can redistribute it and/or modify @@ -34,7 +34,7 @@ #include "lib.h" #define VERSION "v0.9.1" -#define COPYRIGHT "Copyright (C) 2006-2007 coresystems GmbH" +#define COPYRIGHT "Copyright (C) 2006-2008 coresystems GmbH" static int isverbose = 0; static int iselfparse = 0; @@ -44,7 +44,7 @@ enum compalgo algo = none; static void usage(char *name) { - printf("\nLAR - the LinuxBIOS Archiver " VERSION "\n" COPYRIGHT "\n\n" + printf("\nLAR - the Lightweight Archiver " VERSION "\n" COPYRIGHT "\n\n" "Usage: %s [-ecxal] archive.lar [[[file1] file2] ...]\n\n", name); printf("Examples:\n"); printf(" lar -c -s 32k -b bootblock myrom.lar foo nocompress:bar\n"); @@ -267,7 +267,7 @@ int main(int argc, char *argv[]) isverbose = 1; break; case 'V': - printf("LAR - the LinuxBIOS Archiver " VERSION "\n"); + printf("LAR - the Lightweight Archiver " VERSION "\n"); break; default: usage(argv[0]); diff --git a/util/lar/lar.h b/util/lar/lar.h index 50baa28b70..7331f146f0 100644 --- a/util/lar/lar.h +++ b/util/lar/lar.h @@ -1,5 +1,5 @@ /* - * lar - LinuxBIOS archiver + * lar - lightweight archiver * * Copyright (C) 2006 coresystems GmbH * (Written by Stefan Reinauer for coresystems GmbH) @@ -61,7 +61,7 @@ typedef uint64_t u64; typedef uint32_t u32; typedef uint8_t u8; -/* NOTE -- This and the linuxbios lar.h may NOT be in sync. Be careful. */ +/* NOTE -- This and the coreboot lar.h may NOT be in sync. Be careful. */ struct lar_header { char magic[8]; u32 len; diff --git a/util/lar/lib.c b/util/lar/lib.c index 68a646f2c0..a03f7b5c6c 100644 --- a/util/lar/lib.c +++ b/util/lar/lib.c @@ -1,5 +1,5 @@ /* - * lar - LinuxBIOS archiver + * lar - lightweight archiver * * Copyright (C) 2006-2007 coresystems GmbH * (Written by Stefan Reinauer for coresystems GmbH) diff --git a/util/lar/lib.h b/util/lar/lib.h index 721c0a3287..656ace9507 100644 --- a/util/lar/lib.h +++ b/util/lar/lib.h @@ -1,5 +1,5 @@ /* - * lar - LinuxBIOS archiver + * lar - lightweight archiver * * Copyright (C) 2006-2007 coresystems GmbH * (Written by Stefan Reinauer for coresystems GmbH) diff --git a/util/lar/stream.c b/util/lar/stream.c index 93611d5846..75e99170f1 100644 --- a/util/lar/stream.c +++ b/util/lar/stream.c @@ -1,5 +1,5 @@ /* - * lar - LinuxBIOS archiver + * lar - lightweight archiver * * This includes code from previous versions of the LAR utility, * including create.c, list.c, extract.c and bootblock.c diff --git a/util/lzma/Makefile b/util/lzma/Makefile index e02dbd38b4..960bfe01ff 100644 --- a/util/lzma/Makefile +++ b/util/lzma/Makefile @@ -1,5 +1,5 @@ ## -## This file is part of the LinuxBIOS project. +## This file is part of the coreboot project. ## ## Copyright (C) 2007 coresystems GmbH ## diff --git a/util/nrv2b/Makefile b/util/nrv2b/Makefile index 5a93f2a712..5a35ddf267 100644 --- a/util/nrv2b/Makefile +++ b/util/nrv2b/Makefile @@ -1,5 +1,5 @@ ## -## This file is part of the LinuxBIOS project. +## This file is part of the coreboot project. ## ## Copyright (C) 2007 coresystems GmbH ## (Written by Stefan Reinauer for coresystems GmbH) diff --git a/util/options/Makefile b/util/options/Makefile index a225bae8e3..c5d8b4be12 100644 --- a/util/options/Makefile +++ b/util/options/Makefile @@ -1,5 +1,5 @@ ## -## This file is part of the LinuxBIOS project. +## This file is part of the coreboot project. ## ## Copyright (C) 2007 coresystems GmbH ## (Written by Stefan Reinauer for coresystems GmbH) diff --git a/util/options/build_opt_tbl.c b/util/options/build_opt_tbl.c index ee48cba108..396cb8a6a3 100644 --- a/util/options/build_opt_tbl.c +++ b/util/options/build_opt_tbl.c @@ -462,17 +462,17 @@ int main(int argc, char **argv) exit(1); } /* And since we are not ready to be fully general purpose yet.. */ - if ((cs->range_start/8) != LB_CKS_RANGE_START) { + if ((cs->range_start/8) != CB_CKS_RANGE_START) { fprintf(stderr, "Error - Range start(%d) does not match define(%d) in line\n%s\n", - cs->range_start/8, LB_CKS_RANGE_START, line); + cs->range_start/8, CB_CKS_RANGE_START, line); exit(1); } - if ((cs->range_end/8) != LB_CKS_RANGE_END) { + if ((cs->range_end/8) != CB_CKS_RANGE_END) { fprintf(stderr, "Error - Range end (%d) does not match define (%d) in line\n%s\n", - (cs->range_end/8), LB_CKS_RANGE_END, line); + (cs->range_end/8), CB_CKS_RANGE_END, line); exit(1); } - if ((cs->location/8) != LB_CKS_LOC) { + if ((cs->location/8) != CB_CKS_LOC) { fprintf(stderr, "Error - Location does not match define in line\n%s\n", line); exit(1); } diff --git a/util/x86emu/Makefile b/util/x86emu/Makefile index ec2d2fbf44..e14422c261 100644 --- a/util/x86emu/Makefile +++ b/util/x86emu/Makefile @@ -1,5 +1,5 @@ ## -## This file is part of the LinuxBIOS project. +## This file is part of the coreboot project. ## ## Copyright (C) 2007 coresystems GmbH ## diff --git a/util/x86emu/biosemu.c b/util/x86emu/biosemu.c index 1ca2d8208c..97a222f407 100644 --- a/util/x86emu/biosemu.c +++ b/util/x86emu/biosemu.c @@ -17,7 +17,7 @@ * it with the version available from LANL. */ /* - * This file is part of the LinuxBIOS project. + * This file is part of the coreboot project. * * (c) Copyright 2000, Ron Minnich, Advanced Computing Lab, LANL * diff --git a/util/x86emu/include/x86emu/x86emu.h b/util/x86emu/include/x86emu/x86emu.h index f45796639b..0310516ca7 100644 --- a/util/x86emu/include/x86emu/x86emu.h +++ b/util/x86emu/include/x86emu/x86emu.h @@ -43,7 +43,7 @@ #define __X86EMU_X86EMU_H /* FIXME: undefine printk for the moment */ -#ifdef LINUXBIOS_VERSION +#ifdef COREBOOT_VERSION #include #define printk(x...) printk(BIOS_DEBUG, x) #else diff --git a/util/x86emu/pcbios/pcibios.c b/util/x86emu/pcbios/pcibios.c index fdfdff8be8..9bdaecef99 100644 --- a/util/x86emu/pcbios/pcibios.c +++ b/util/x86emu/pcbios/pcibios.c @@ -17,7 +17,7 @@ * it with the version available from LANL. */ /* - * This file is part of the LinuxBIOS project. + * This file is part of the coreboot project. * * (c) Copyright 2000, Ron Minnich, Advanced Computing Lab, LANL * diff --git a/util/x86emu/pcbios/pcibios.h b/util/x86emu/pcbios/pcibios.h index c0bbbe91ac..0ee19112f7 100644 --- a/util/x86emu/pcbios/pcibios.h +++ b/util/x86emu/pcbios/pcibios.h @@ -17,7 +17,7 @@ * it with the version available from LANL. */ /* - * This file is part of the LinuxBIOS project. + * This file is part of the coreboot project. * * (c) Copyright 2000, Ron Minnich, Advanced Computing Lab, LANL * diff --git a/util/x86emu/vm86.c b/util/x86emu/vm86.c index 315cee192e..c9e4b6a280 100644 --- a/util/x86emu/vm86.c +++ b/util/x86emu/vm86.c @@ -341,10 +341,10 @@ struct realidt { // that simplifies a lot of things ... // we'll just push all the registers on the stack as longwords, // and pop to protected mode. -// second, since this only ever runs as part of linuxbios, +// second, since this only ever runs as part of coreboot, // we know all the segment register values -- so we don't save any. // keep the handler that calls things small. It can do a call to -// more complex code in linuxbios itself. This helps a lot as we don't +// more complex code in coreboot itself. This helps a lot as we don't // have to do address fixup in this little stub, and calls are absolute // so the handler is relocatable. void handler(void) diff --git a/util/x86emu/x86emu/sys.c b/util/x86emu/x86emu/sys.c index 25331030d9..16cd3207ef 100644 --- a/util/x86emu/x86emu/sys.c +++ b/util/x86emu/x86emu/sys.c @@ -45,7 +45,7 @@ #include #include "debug.h" #include "prim_ops.h" -#ifdef LINUXBIOS_VERSION +#ifdef COREBOOT_VERSION #include "io.h" #else #include diff --git a/util/xcompile/xcompile b/util/xcompile/xcompile index 3d97325297..a3c47bb042 100755 --- a/util/xcompile/xcompile +++ b/util/xcompile/xcompile @@ -1,6 +1,6 @@ #!/bin/sh # -# This file is part of the LinuxBIOS project. +# This file is part of the coreboot project. # # Copyright (C) 2007 coresystems GmbH # (Written by Stefan Reinauer for coresystems GmbH) @@ -110,5 +110,5 @@ testcc "$CC" "-fno-stack-protector" && CFLAGS="$CFLAGS-fno-stack-protector " echo "CFLAGS_x86 := $CFLAGS" # TODO: The same as above for PowerPC, and other architectures -# as soon as they are supported by LinuxBIOSv3. +# as soon as they are supported by coreboot v3.