UPSTREAM: src: change coreboot to lowercase

The word 'coreboot' should always be written in lowercase, even at the
start of a sentence.

BUG=none
BRANCH=none
TEST=none

Change-Id: I280a7abeada01b4d158b2d65c3b59f1b98b81ad9
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Original-Commit-Id: e18e6427d0
Original-Change-Id: I7945ddb988262e7483da4e623cedf972380e65a2
Original-Signed-off-by: Martin Roth <martinroth@google.com>
Original-Reviewed-on: https://review.coreboot.org/20029
Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Original-Reviewed-by: Philippe Mathieu-Daud <philippe.mathieu.daude@gmail.com>
Original-Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://chromium-review.googlesource.com/528259
Commit-Ready: Patrick Georgi <pgeorgi@chromium.org>
Tested-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-by: Patrick Georgi <pgeorgi@chromium.org>

src/mainboard/amd/inagua/broadcom.c

@@ -26,7 +26,7 @@
 
 #include <types.h>
 #include <console/console.h>
-#include <device/device.h>	//Coreboot device access
+#include <device/device.h>	//coreboot device access
 #include <device/pci.h>
 #include <delay.h>
 #include <endian.h>

src/mainboard/pcengines/alix2d/romstage.c

@@ -105,7 +105,7 @@ static void mb_gpio_init(void)
 	 * Info: GPIO_IO_BASE, 0x6100, is only valid before PCI init, so it
 	 *       may be used here, but not after PCI Init.
 	 * Note: Prior to a certain release, Linux used a hardwired 0x6100 in the
-	 *       leds-alix2.c driver. Coreboot dynamically assigns this space,
+	 *       leds-alix2.c driver. coreboot dynamically assigns this space,
 	 *       so the driver does not work anymore.
 	 *       Good workaround: use the newer driver
 	 *       Ugly workaround: $ wrmsr 0x5140000C 0xf00100006100