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soc/mediatek/mt8196: Map LPDDR type to mem_chip_type

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Implement map_to_lpddr_dram_type to convert MT8196 specific
DRAM_DRAM_TYPE_T values to mem_chip_type.

BUG=b:357743097
TEST=Firmware shows the following log:
LPDDR5 chan0(x16) rank0: density 12288mbits x16, MF 06 rev 0800
LPDDR5 chan0(x16) rank1: density 12288mbits x16, MF 06 rev 0800
LPDDR5 chan1(x16) rank0: density 12288mbits x16, MF 06 rev 0800
LPDDR5 chan1(x16) rank1: density 12288mbits x16, MF 06 rev 0800
LPDDR5 chan2(x16) rank0: density 12288mbits x16, MF 06 rev 0800
LPDDR5 chan2(x16) rank1: density 12288mbits x16, MF 06 rev 0800
LPDDR5 chan3(x16) rank0: density 12288mbits x16, MF 06 rev 0800
LPDDR5 chan3(x16) rank1: density 12288mbits x16, MF 06 rev 0800

Change-Id: I63ce238ff0fbcdde9020a7cf4fee2e29d6decf37
Signed-off-by: Crystal Guo <crystal.guo@mediatek.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/85099
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Reviewed-by: Yidi Lin <yidilin@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Crystal Guo 2024-08-12 15:06:17 +08:00 • committed by Yu-Ping Wu
commit 613c5f9ff2
3 changed files with 37 additions and 1 deletions
Download patch file Download diff file Expand all files Collapse all files

2
src/soc/mediatek/mt8196/Makefile.mk
View file

@ -24,7 +24,7 @@ romstage-$(CONFIG_PCI) += ../common/early_init.c ../common/pcie.c
romstage-y += ../common/emi.c
romstage-y += irq2axi.c
romstage-y += l2c_ops.c
romstage-y += ../common/memory.c
romstage-y += ../common/memory.c memory.c
romstage-y += ../common/memory_test.c
romstage-y += ../common/mmu_operations.c ../common/mmu_cmops.c

17
src/soc/mediatek/mt8196/include/soc/dramc_soc.h
View file

@ -43,6 +43,23 @@ typedef enum {
IMP_DRV_MAX,
} DRAM_IMP_DRV_T;
typedef enum {
TYPE_DDR1 = 1,
TYPE_DDR2,
TYPE_DDR3,
TYPE_DDR4,
TYPE_DDR5,
TYPE_LPDDR2,
TYPE_LPDDR3,
TYPE_PCDDR3,
TYPE_LPDDR4,
TYPE_LPDDR4X,
TYPE_LPDDR4P,
TYPE_LPDDR5,
TYPE_LPDDR5X,
TYPE_MAX,
} DRAM_DRAM_TYPE_T;
#define DRAM_DFS_SHU_MAX DRAM_DFS_SRAM_MAX
#define DQS_NUMBER_LP5 2
#define DQ_DATA_WIDTH_LP5 16

19
src/soc/mediatek/mt8196/memory.c Normal file
View file

@ -0,0 +1,19 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <stdint.h>
#include <commonlib/bsd/mem_chip_info.h>
#include <soc/emi.h>
enum mem_chip_type map_to_lpddr_dram_type(uint16_t lpddr_type)
{
switch (lpddr_type) {
case TYPE_LPDDR4X:
return MEM_CHIP_LPDDR4X;
case TYPE_LPDDR5:
return MEM_CHIP_LPDDR5;
case TYPE_LPDDR5X:
return MEM_CHIP_LPDDR5X;
default:
return MEM_CHIP_UNDEFINED;
}
}