diff --git a/src/northbridge/intel/haswell/early_peg.c b/src/northbridge/intel/haswell/early_peg.c
index 4be9994629..4b923bb708 100644
--- a/src/northbridge/intel/haswell/early_peg.c
+++ b/src/northbridge/intel/haswell/early_peg.c
@@ -8,27 +8,22 @@
 
 static bool peg_hidden[MAX_PEG_FUNC];
 
-static void start_peg2_link_training(const pci_devfn_t dev)
+static u32 deven_for_peg(const u8 func)
 {
-	u32 mask;
-
-	switch (dev) {
-	case PCI_DEV(0, 1, 2):
-		mask = DEVEN_D1F2EN;
-		break;
-	case PCI_DEV(0, 1, 1):
-		mask = DEVEN_D1F1EN;
-		break;
-	case PCI_DEV(0, 1, 0):
-		mask = DEVEN_D1F0EN;
-		break;
-	default:
-		printk(BIOS_ERR, "Link training tried on a non-PEG device!\n");
-		return;
+	switch (func) {
+		case 0:  return DEVEN_D1F0EN;
+		case 1:  return DEVEN_D1F1EN;
+		case 2:  return DEVEN_D1F2EN;
+		default: return 0;
 	}
+}
+
+static void start_peg2_link_training(const u8 func)
+{
+	const pci_devfn_t dev = PEG_DEV(func);
 
 	pci_update_config32(dev, 0xc24, ~(1 << 16), 1 << 5);
-	printk(BIOS_DEBUG, "Started PEG1%d link training.\n", PCI_FUNC(PCI_DEV2DEVFN(dev)));
+	printk(BIOS_DEBUG, "Started PEG1%u link training.\n", func);
 
 	/*
 	 * The MRC will perform PCI enumeration, and if it detects a VGA
@@ -44,10 +39,20 @@ static void start_peg2_link_training(const pci_devfn_t dev)
 	 * way to fix this problem for good is to implement native init.
 	 */
 	if (CONFIG(HASWELL_HIDE_PEG_FROM_MRC)) {
-		pci_update_config32(HOST_BRIDGE, DEVEN, ~mask, 0);
-		peg_hidden[PCI_FUNC(PCI_DEV2DEVFN(dev))] = true;
-		printk(BIOS_DEBUG, "Temporarily hiding PEG1%d.\n",
-		       PCI_FUNC(PCI_DEV2DEVFN(dev)));
+		pci_and_config32(HOST_BRIDGE, DEVEN, ~deven_for_peg(func));
+		peg_hidden[func] = true;
+		printk(BIOS_DEBUG, "Temporarily hiding PEG1%u.\n", func);
+	}
+}
+
+void northbridge_setup_peg(void)
+{
+	const u32 deven = pci_read_config32(HOST_BRIDGE, DEVEN);
+
+	for (u8 func = 0; func < MAX_PEG_FUNC; func++) {
+		if (deven & deven_for_peg(func)) {
+			start_peg2_link_training(func);
+		}
 	}
 }
 
@@ -55,27 +60,13 @@ void northbridge_unhide_peg(void)
 {
 	u32 deven = pci_read_config32(HOST_BRIDGE, DEVEN);
 
-	for (u8 fn = 0; fn < MAX_PEG_FUNC; fn++) {
-		if (peg_hidden[fn]) {
-			deven |= DEVEN_D1F0EN >> fn;
-			peg_hidden[fn] = false;
-			printk(BIOS_DEBUG, "Unhiding PEG1%d.\n", fn);
+	for (u8 func = 0; func < MAX_PEG_FUNC; func++) {
+		if (peg_hidden[func]) {
+			deven |= deven_for_peg(func);
+			peg_hidden[func] = false;
+			printk(BIOS_DEBUG, "Unhiding PEG1%u.\n", func);
 		}
 	}
 
 	pci_write_config32(HOST_BRIDGE, DEVEN, deven);
 }
-
-void northbridge_setup_peg(void)
-{
-	u32 deven = pci_read_config32(HOST_BRIDGE, DEVEN);
-
-	if (deven & DEVEN_D1F2EN)
-		start_peg2_link_training(PCI_DEV(0, 1, 2));
-
-	if (deven & DEVEN_D1F1EN)
-		start_peg2_link_training(PCI_DEV(0, 1, 1));
-
-	if (deven & DEVEN_D1F0EN)
-		start_peg2_link_training(PCI_DEV(0, 1, 0));
-}