From 608db150f1cfdfab9ec8cda7891e341a8102a9f3 Mon Sep 17 00:00:00 2001 From: Patrick Rudolph Date: Thu, 10 Apr 2025 11:05:03 +0200 Subject: [PATCH] smmrelocate: Drop unused parameter MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The parameter CPU isn't used, thus drop it. Change-Id: Ie7f6179f0545f905463752e94243b438143d8234 Signed-off-by: Patrick Rudolph Reviewed-on: https://review.coreboot.org/c/coreboot/+/87257 Tested-by: build bot (Jenkins) Reviewed-by: Jérémy Compostella Reviewed-by: Shuo Liu --- src/cpu/intel/haswell/smmrelocate.c | 8 ++++---- src/soc/intel/common/block/cpu/smmrelocate.c | 8 ++++---- src/soc/intel/xeon_sp/smmrelocate.c | 8 ++++---- 3 files changed, 12 insertions(+), 12 deletions(-) diff --git a/src/cpu/intel/haswell/smmrelocate.c b/src/cpu/intel/haswell/smmrelocate.c index 9e3554f9e3..47946e8401 100644 --- a/src/cpu/intel/haswell/smmrelocate.c +++ b/src/cpu/intel/haswell/smmrelocate.c @@ -17,9 +17,9 @@ #include #include "haswell.h" -static void update_save_state(int cpu, uintptr_t curr_smbase, - uintptr_t staggered_smbase, - struct smm_relocation_params *relo_params) +static void update_save_state(uintptr_t curr_smbase, + uintptr_t staggered_smbase, + struct smm_relocation_params *relo_params) { u32 smbase; u32 iedbase; @@ -120,7 +120,7 @@ void smm_relocation_handler(int cpu, uintptr_t curr_smbase, } /* Make appropriate changes to the save state map. */ - update_save_state(cpu, curr_smbase, staggered_smbase, relo_params); + update_save_state(curr_smbase, staggered_smbase, relo_params); /* Write PRMRR and SMRR MSRs based on indicated support. */ mtrr_cap = rdmsr(MTRR_CAP_MSR); diff --git a/src/soc/intel/common/block/cpu/smmrelocate.c b/src/soc/intel/common/block/cpu/smmrelocate.c index 4df90fd7ce..20697825cf 100644 --- a/src/soc/intel/common/block/cpu/smmrelocate.c +++ b/src/soc/intel/common/block/cpu/smmrelocate.c @@ -19,9 +19,9 @@ #include #include -static void update_save_state(int cpu, uintptr_t curr_smbase, - uintptr_t staggered_smbase, - struct smm_relocation_params *relo_params) +static void update_save_state(uintptr_t curr_smbase, + uintptr_t staggered_smbase, + struct smm_relocation_params *relo_params) { u32 smbase; u32 iedbase; @@ -136,7 +136,7 @@ void smm_relocation_handler(int cpu, uintptr_t curr_smbase, } /* Make appropriate changes to the save state map. */ - update_save_state(cpu, curr_smbase, staggered_smbase, relo_params); + update_save_state(curr_smbase, staggered_smbase, relo_params); /* * The SMRR MSRs are core-level registers, so if two threads that share diff --git a/src/soc/intel/xeon_sp/smmrelocate.c b/src/soc/intel/xeon_sp/smmrelocate.c index c359237463..c1079d31a6 100644 --- a/src/soc/intel/xeon_sp/smmrelocate.c +++ b/src/soc/intel/xeon_sp/smmrelocate.c @@ -84,9 +84,9 @@ void get_smm_info(uintptr_t *perm_smbase, size_t *perm_smsize, *smm_save_state_size = sizeof(em64t101_smm_state_save_area_t); } -static void update_save_state(int cpu, uintptr_t curr_smbase, - uintptr_t staggered_smbase, - struct smm_relocation_params *relo_params) +static void update_save_state(uintptr_t curr_smbase, + uintptr_t staggered_smbase, + struct smm_relocation_params *relo_params) { u32 smbase; u32 iedbase; @@ -122,7 +122,7 @@ void smm_relocation_handler(int cpu, uintptr_t curr_smbase, printk(BIOS_DEBUG, "%s : CPU %d\n", __func__, cpu); /* Make appropriate changes to the save state map. */ - update_save_state(cpu, curr_smbase, staggered_smbase, relo_params); + update_save_state(curr_smbase, staggered_smbase, relo_params); /* Write SMRR MSRs based on indicated support. */ mtrr_cap = rdmsr(MTRR_CAP_MSR);