From 608a2c5768e9300c81b7c72fb8ab7a0c7c142bec Mon Sep 17 00:00:00 2001 From: Duncan Laurie Date: Tue, 17 Dec 2013 15:35:51 -0800 Subject: [PATCH] lynxpoint: Don't enable SMI handling of TCO We have no good reason to be handling the TCO timeout as an SMI since we aren't doing anything special with it and clearing the status in the handler prevents the reboot from actually happening. BUG=chromium:321832 BRANCH=falco,peppy,wolf,leon,beltino,panther,monroe,samus TEST=boot and read PMBASE+30h and check that bit13 is clear Change-Id: I074ac0cfa7230606690e3f0e4c40ebc2a8713635 Signed-off-by: Duncan Laurie Reviewed-on: https://chromium-review.googlesource.com/180672 --- src/southbridge/intel/lynxpoint/smi.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/southbridge/intel/lynxpoint/smi.c b/src/southbridge/intel/lynxpoint/smi.c index 75c3e66743..b88a70f735 100644 --- a/src/southbridge/intel/lynxpoint/smi.c +++ b/src/southbridge/intel/lynxpoint/smi.c @@ -64,14 +64,14 @@ void southbridge_smm_enable_smi(void) disable_gpe(PME_B0_EN); /* Enable SMI generation: - * - on TCO events * - on APMC writes (io 0xb2) * - on writes to SLP_EN (sleep states) * - on writes to GBL_RLS (bios commands) * No SMIs: * - on microcontroller writes (io 0x62/0x66) + * - on TCO events */ - enable_smi(TCO_EN | APMC_EN | SLP_SMI_EN | GBL_SMI_EN | EOS); + enable_smi(APMC_EN | SLP_SMI_EN | GBL_SMI_EN | EOS); } void southbridge_trigger_smi(void)