From 600c12ddf3543d2dcb47fd3e2f0704803dac5957 Mon Sep 17 00:00:00 2001 From: Tom Warren Date: Mon, 8 Dec 2014 14:18:13 -0700 Subject: [PATCH] ryu: audio: Setup I2S1/DAP2 and EXTPERIPH1/MCLK muxes correctly This configures I2S1 and the codec MCLK muxes to pass the PCM audio data to the RT5677 codec. Once depthcharge RT5677 codec driver changes are in, audio 'beeps' should be heard on boot (Ctrl-U / devmode/recmode). BUG=chrome-os-partner:32582 BRANCH=none TEST=Built and booted Ryu/A44. Change-Id: Ib071bcb41fba8f6d628a386ed233ec84a54b0323 Signed-off-by: Tom Warren Reviewed-on: https://chromium-review.googlesource.com/233945 Reviewed-by: Aaron Durbin --- src/mainboard/google/rush_ryu/mainboard.c | 39 ++++++++++++++++------- 1 file changed, 27 insertions(+), 12 deletions(-) diff --git a/src/mainboard/google/rush_ryu/mainboard.c b/src/mainboard/google/rush_ryu/mainboard.c index aa539f77b3..9ad3592c85 100644 --- a/src/mainboard/google/rush_ryu/mainboard.c +++ b/src/mainboard/google/rush_ryu/mainboard.c @@ -169,6 +169,21 @@ static int enable_lcd_vdd(void) return 0; } +static const struct pad_config i2s1_pad[] = { + /* I2S1 */ + PAD_CFG_SFIO(DAP2_SCLK, PINMUX_INPUT_ENABLE, I2S1), + PAD_CFG_SFIO(DAP2_FS, PINMUX_INPUT_ENABLE, I2S1), + PAD_CFG_SFIO(DAP2_DOUT, PINMUX_INPUT_ENABLE, I2S1), + PAD_CFG_SFIO(DAP2_DIN, PINMUX_INPUT_ENABLE | PINMUX_TRISTATE, I2S1), + /* codec MCLK via EXTPERIPH1 */ + PAD_CFG_SFIO(DAP_MCLK1, PINMUX_PULL_NONE, EXTPERIPH1), +}; + +static const struct funit_cfg audio_funit[] = { + /* We need 1.5MHz for I2S1. So we use CLK_M */ + FUNIT_CFG(I2S1, CLK_M, 1500, i2s1_pad, ARRAY_SIZE(i2s1_pad)), +}; + static int configure_display_blocks(void) { /* set and enable panel related vdd */ @@ -184,24 +199,24 @@ static int configure_display_blocks(void) /* Audio init: clocks and enables/resets */ static void setup_audio(void) { - /* External peripheral 1: audio codec (RT5677) using 12MHz CLK1 */ + /* + * External peripheral 1: audio codec (RT5677) uses 12MHz CLK1 + * NOTE: We can't use a funits struct/call here because EXTPERIPH1/2/3 + * don't have BASE regs or CAR RST/ENA bits. Also, the mux setting for + * EXTPERIPH1/DAP_MCLK1 is rolled into the I2S1 padcfg. + */ clock_configure_source(extperiph1, CLK_M, 12000); - /* - * We need 1.5MHz for I2S1. So, we use CLK_M. CLK_DIVIDER macro - * returns a divisor (0xe) a little bit off from the ideal value (0xd), - * but it's good enough for beeps. - */ - clock_configure_source(i2s1, CLK_M, 1500); + soc_configure_funits(audio_funit, ARRAY_SIZE(audio_funit)); clock_external_output(1); /* For external RT5677 audio codec. */ /* - * Confirmed by NVIDIA hardware team, we need to take ALL audio devices - * connected to AHUB (AUDIO, APBIF, I2S, DAM, AMX, ADX, SPDIF, AFC) out - * of reset and clock-enabled, otherwise reading AHUB devices (in our - * case, I2S/APBIF/AUDIO) will hang. - */ + * Confirmed by NVIDIA hardware team, we need to take ALL audio devices + * connected to AHUB (AUDIO, APBIF, I2S, DAM, AMX, ADX, SPDIF, AFC) out + * of reset and clock-enabled, otherwise reading AHUB devices (in our + * case, I2S/APBIF/AUDIO) will hang. + */ clock_enable_audio(); }