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soc/mediatek/mt8196: Move sspm_enable_sram() to common code

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To promote code reuse and maintainability, move mt8196/sspm_sram.c to
common folder. The macro for the register SSPM_SRAM_CON is replaced by
'mtk_spm->sspm_sram_con' since it is already defined in spm.h.

BUG=b:379008996
BRANCH=none
TEST=build passed.

Signed-off-by: Vince Liu <vince-wl.liu@mediatek.corp-partner.google.com>
Change-Id: I71912a23537a8bb26ed431d06123a875b80b8e4f
Reviewed-on: https://review.coreboot.org/c/coreboot/+/87661
Reviewed-by: Yidi Lin <yidilin@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
This commit is contained in:
Vince Liu 2025-04-20 16:30:12 +08:00 • committed by Yidi Lin
commit 5e2aee4474
3 changed files with 6 additions and 4 deletions
Download patch file Download diff file Expand all files Collapse all files

7
src/soc/mediatek/mt8196/sspm_sram.c → src/soc/mediatek/common/sspm_sram.c
View file

@ -1,9 +1,10 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/* SPDX-License-Identifier: GPL-2.0-only OR MIT */
#include <device/mmio.h>
#include <soc/addressmap.h>
#include <soc/spm.h>
#include <soc/sspm.h>
#define SSPM_SRAM_CON (SPM_BASE + 0xEE4)
#define SPM_PRJ_CODE 0xB160001
#define SSPM_SRAM_SLEEP_B 0x10
#define SSPM_SRAM_ISOINT_B 0x2
@ -11,5 +12,5 @@
void sspm_enable_sram(void)
{
write32p(SPM_BASE, SPM_PRJ_CODE);
write32p(SSPM_SRAM_CON, SSPM_SRAM_SLEEP_B | SSPM_SRAM_ISOINT_B);
write32(&mtk_spm->sspm_sram_con, SSPM_SRAM_SLEEP_B | SSPM_SRAM_ISOINT_B);
}

2
src/soc/mediatek/mt8196/Makefile.mk
View file

@ -81,7 +81,7 @@ ramstage-y += ../common/mtk_fsp.c
ramstage-y += pi_image.c
ramstage-y += soc.c
ramstage-y += ../common/spm.c ../common/spm_v2.c spm.c
ramstage-y += ../common/sspm.c sspm_sram.c
ramstage-y += ../common/sspm.c ../common/sspm_sram.c
ramstage-y += ../common/pmif_clk.c pmif_clk.c
ramstage-y += ../common/pmif.c pmif_init.c
ramstage-y += pmif_spmi.c

1
src/soc/mediatek/mt8196/include/soc/spm.h
View file

@ -1130,6 +1130,7 @@ check_member(mtk_spm_regs, md32pcm_cfgreg_sw_rstn, 0xA00);
check_member(mtk_spm_regs, md32pcm_dma0_src, 0xC00);
check_member(mtk_spm_regs, md32pcm_dma0_rlct, 0xC24);
check_member(mtk_spm_regs, md1_pwr_con, 0xE00);
check_member(mtk_spm_regs, sspm_sram_con, 0xEE4);
check_member(mtk_spm_regs, soc_buck_iso_con, 0xF00);
check_member(mtk_spm_regs, spm_twam_timer_out, 0xFFC);
check_member(mtk_spm_regs, spm_lteclksq_bg_off, 0x9220);