diff --git a/src/mainboard/siemens/mc_rpl/devicetree.cb b/src/mainboard/siemens/mc_rpl/devicetree.cb index 98e2b4d31e..fd582dfbb1 100644 --- a/src/mainboard/siemens/mc_rpl/devicetree.cb +++ b/src/mainboard/siemens/mc_rpl/devicetree.cb @@ -1,14 +1,5 @@ chip soc/intel/alderlake - # This disables autonomous GPIO power management, otherwise - # old cr50 FW only supports short pulses. - register "gpio_override_pm" = "1" - register "gpio_pm[COMM_0]" = "0" - register "gpio_pm[COMM_1]" = "0" - register "gpio_pm[COMM_2]" = "0" - register "gpio_pm[COMM_4]" = "0" - register "gpio_pm[COMM_5]" = "0" - # GPE configuration # Note that GPE events called out in ASL code rely on this # route. i.e. If this route changes then the affected GPE diff --git a/src/mainboard/siemens/mc_rpl/dsdt.asl b/src/mainboard/siemens/mc_rpl/dsdt.asl index 161069c862..64ada0bd66 100644 --- a/src/mainboard/siemens/mc_rpl/dsdt.asl +++ b/src/mainboard/siemens/mc_rpl/dsdt.asl @@ -1,7 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only */ #include -#include #include DefinitionBlock( @@ -23,16 +22,5 @@ DefinitionBlock( #include } -#if CONFIG(EC_GOOGLE_CHROMEEC) - /* ChromeOS Embedded Controller */ - Scope (\_SB.PCI0.LPCB) - { - /* ACPI code for EC SuperIO functions */ - #include - /* ACPI code for EC functions */ - #include - } -#endif - #include } diff --git a/src/mainboard/siemens/mc_rpl/include/baseboard/ec.h b/src/mainboard/siemens/mc_rpl/include/baseboard/ec.h deleted file mode 100644 index 6a5c72ceeb..0000000000 --- a/src/mainboard/siemens/mc_rpl/include/baseboard/ec.h +++ /dev/null @@ -1,72 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -#ifndef __BASEBOARD_EC_H__ -#define __BASEBOARD_EC_H__ - -#include -#include -#include - -#define MAINBOARD_EC_SCI_EVENTS \ - (EC_HOST_EVENT_MASK(EC_HOST_EVENT_LID_CLOSED) |\ - EC_HOST_EVENT_MASK(EC_HOST_EVENT_LID_OPEN) |\ - EC_HOST_EVENT_MASK(EC_HOST_EVENT_AC_CONNECTED) |\ - EC_HOST_EVENT_MASK(EC_HOST_EVENT_AC_DISCONNECTED) |\ - EC_HOST_EVENT_MASK(EC_HOST_EVENT_BATTERY_LOW) |\ - EC_HOST_EVENT_MASK(EC_HOST_EVENT_BATTERY_CRITICAL) |\ - EC_HOST_EVENT_MASK(EC_HOST_EVENT_BATTERY) |\ - EC_HOST_EVENT_MASK(EC_HOST_EVENT_BATTERY_STATUS) |\ - EC_HOST_EVENT_MASK(EC_HOST_EVENT_THERMAL_THRESHOLD) |\ - EC_HOST_EVENT_MASK(EC_HOST_EVENT_THROTTLE_START) |\ - EC_HOST_EVENT_MASK(EC_HOST_EVENT_THROTTLE_STOP) |\ - EC_HOST_EVENT_MASK(EC_HOST_EVENT_PD_MCU) |\ - EC_HOST_EVENT_MASK(EC_HOST_EVENT_MODE_CHANGE) |\ - EC_HOST_EVENT_MASK(EC_HOST_EVENT_MKBP) |\ - EC_HOST_EVENT_MASK(EC_HOST_EVENT_USB_MUX)) - -#define MAINBOARD_EC_SMI_EVENTS \ - (EC_HOST_EVENT_MASK(EC_HOST_EVENT_LID_CLOSED)) - -/* EC can wake from S5 with lid or power button */ -#define MAINBOARD_EC_S5_WAKE_EVENTS \ - (EC_HOST_EVENT_MASK(EC_HOST_EVENT_LID_OPEN) |\ - EC_HOST_EVENT_MASK(EC_HOST_EVENT_POWER_BUTTON)) - -/* - * EC can wake from S3 with lid or power button or key press or AC connect/disconnect or - * mode change event. - */ -#define MAINBOARD_EC_S3_WAKE_EVENTS \ - (MAINBOARD_EC_S5_WAKE_EVENTS |\ - EC_HOST_EVENT_MASK(EC_HOST_EVENT_AC_CONNECTED) |\ - EC_HOST_EVENT_MASK(EC_HOST_EVENT_AC_DISCONNECTED) |\ - EC_HOST_EVENT_MASK(EC_HOST_EVENT_KEY_PRESSED) |\ - EC_HOST_EVENT_MASK(EC_HOST_EVENT_MODE_CHANGE)) - -#define MAINBOARD_EC_S0IX_WAKE_EVENTS (MAINBOARD_EC_S3_WAKE_EVENTS) - -/* Log EC wake events plus EC shutdown events */ -#define MAINBOARD_EC_LOG_EVENTS \ - (EC_HOST_EVENT_MASK(EC_HOST_EVENT_THERMAL_SHUTDOWN) |\ - EC_HOST_EVENT_MASK(EC_HOST_EVENT_BATTERY_SHUTDOWN) |\ - EC_HOST_EVENT_MASK(EC_HOST_EVENT_PANIC)) - -/* - * ACPI related definitions for ASL code. - */ - -/* Enable EC backed ALS device in ACPI */ -#define EC_ENABLE_ALS_DEVICE - -/* Enable EC backed PD MCU device in ACPI */ -#define EC_ENABLE_PD_MCU_DEVICE - -/* Enable LID switch and provide wake pin for EC */ -#define EC_ENABLE_LID_SWITCH -#define EC_ENABLE_WAKE_PIN GPE_EC_WAKE - -#define SIO_EC_MEMMAP_ENABLE /* EC Memory Map Resources */ -#define SIO_EC_HOST_ENABLE /* EC Host Interface Resources */ -#define SIO_EC_ENABLE_PS2K /* Enable PS/2 Keyboard */ - -#endif /* __BASEBOARD_EC_H__ */ diff --git a/src/mainboard/siemens/mc_rpl/include/baseboard/gpio.h b/src/mainboard/siemens/mc_rpl/include/baseboard/gpio.h index 9a1c5851c0..a27221c728 100644 --- a/src/mainboard/siemens/mc_rpl/include/baseboard/gpio.h +++ b/src/mainboard/siemens/mc_rpl/include/baseboard/gpio.h @@ -6,12 +6,4 @@ #include #include -/* eSPI virtual wire reporting */ -#define EC_SCI_GPI GPE0_ESPI - -/* EC wake is LAN_WAKE# which is a special DeepSX wake pin */ -#define GPE_EC_WAKE GPE0_LAN_WAK - -#define GPIO_EC_IN_RW GPP_E7 - #endif /* __BASEBOARD_GPIO_H__ */ diff --git a/src/mainboard/siemens/mc_rpl/mainboard.c b/src/mainboard/siemens/mc_rpl/mainboard.c index a95e1efae6..46741323c8 100644 --- a/src/mainboard/siemens/mc_rpl/mainboard.c +++ b/src/mainboard/siemens/mc_rpl/mainboard.c @@ -2,34 +2,15 @@ #include #include -#include -#include #include -#include -#include -#include #include #include #include -#include "board_id.h" - -const char *smbios_system_sku(void) -{ - static char sku_str[7] = ""; - uint8_t sku_id = get_board_id(); - - snprintf(sku_str, sizeof(sku_str), "sku%u", sku_id); - return sku_str; -} - static void mainboard_init(void *chip_info) { variant_configure_gpio_pads(); - if (CONFIG(EC_GOOGLE_CHROMEEC)) - mainboard_ec_init(); - variant_devtree_update(); } @@ -38,32 +19,6 @@ void __weak variant_devtree_update(void) /* Override dev tree settings per board */ } -#if CONFIG(BOARD_INTEL_ADLRVP_N_EXT_EC) -static void add_fw_config_oem_string(const struct fw_config *config, void *arg) -{ - struct smbios_type11 *t; - char buffer[64]; - - t = (struct smbios_type11 *)arg; - - snprintf(buffer, sizeof(buffer), "%s-%s", config->field_name, config->option_name); - t->count = smbios_add_string(t->eos, buffer); -} - -static void mainboard_smbios_strings(struct device *dev, struct smbios_type11 *t) -{ - fw_config_for_each_found(add_fw_config_oem_string, t); -} -#endif - -static void mainboard_enable(struct device *dev) -{ -#if CONFIG(BOARD_INTEL_ADLRVP_N_EXT_EC) - dev->ops->get_smbios_strings = mainboard_smbios_strings; -#endif -} - struct chip_operations mainboard_ops = { .init = mainboard_init, - .enable_dev = mainboard_enable, }; diff --git a/src/mainboard/siemens/mc_rpl/smihandler.c b/src/mainboard/siemens/mc_rpl/smihandler.c deleted file mode 100644 index a3b43231ec..0000000000 --- a/src/mainboard/siemens/mc_rpl/smihandler.c +++ /dev/null @@ -1,30 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-or-later */ - -#include -#include -#include -#include - -void mainboard_smi_espi_handler(void) -{ - if (!CONFIG(EC_GOOGLE_CHROMEEC)) - return; - - chromeec_smi_process_events(); -} - -void mainboard_smi_sleep(u8 slp_typ) -{ - if (!CONFIG(EC_GOOGLE_CHROMEEC)) - return; - - chromeec_smi_sleep(slp_typ, MAINBOARD_EC_S3_WAKE_EVENTS, MAINBOARD_EC_S5_WAKE_EVENTS); -} - -int mainboard_smi_apmc(u8 apmc) -{ - if (CONFIG(EC_GOOGLE_CHROMEEC)) - chromeec_smi_apmc(apmc, MAINBOARD_EC_SCI_EVENTS, MAINBOARD_EC_SMI_EVENTS); - - return 0; -}