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mb/trulo/var/pujjolo: Enable USB3 WWAN device

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Enable USB3 WWAN since the issue is fixed with the latest schematics.

Schematic version: 500E_S3A0_TWL_MB_FVT_20250527

BUG=b:424945817
BRANCH=none
TEST=Remove Verify USB3 WWAN with the latest schematics.check the WWAN USB3 interface is now working properly..

Change-Id: I30eb74a8456bc63c964269822e0b10135d24aa1f
Signed-off-by: Luca Lai <luca.lai@lcfc.corp-partner.google.com>

Schematic version: 500E_S3A0_TWL_MB_FVT_20250527

BUG=b:424945817
BRANCH=none
TEST=Verify USB3 WWAN with the latest schematics.

Change-Id: I30eb74a8456bc63c964269822e0b10135d24aa1f
Signed-off-by: Luca Lai <luca.lai@lcfc.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/88340
Reviewed-by: Kapil Porwal <kapilporwal@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Luca Lai 2025-07-07 14:32:15 +08:00 • committed by Matt DeVillier
commit 5db8bf0cfa
1 changed files with 1 additions and 1 deletions
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2
src/mainboard/google/brya/variants/pujjolo/overridetree.cb
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@ -69,7 +69,7 @@ chip soc/intel/alderlake
register "usb3_ports[0]" = "USB3_PORT_DEFAULT(OC_SKIP)" # USB3 Type-A port A0(MLB))
register "usb3_ports[1]" = "USB3_PORT_DEFAULT(OC_SKIP)" # USB3 Type-A port A1(DB)
#register "usb3_ports[2]" = "USB3_PORT_DEFAULT(OC_SKIP)" # USB3 port for WWAN
register "usb3_ports[2]" = "USB3_PORT_DEFAULT(OC_SKIP)" # USB3 port for WWAN
# HD Audio
register "pch_hda_dsp_enable" = "1"