From 5db15609a712e254c37f67dfb679e550bfc23487 Mon Sep 17 00:00:00 2001 From: Kilian Krause Date: Fri, 13 Feb 2026 13:13:34 +0100 Subject: [PATCH] mb/siemens/mc_ehl8: Disable SPD write protection for RTC access The mc_ehl8 variant has an RTC (RV3028-C7) at SMBus address 0x52, which falls within the SPD EEPROM address range (0x50-0x57). By default, FSP write-protects this range. Disable write protection for mc_ehl8 to allow RTC configuration. TEST=Boot system into OS and use i2ctools to read out registers 0x00-0x06 of the RTC to verify that the driver set the correct date and time. Change-Id: I0e6426f57d7e316a74102b1e5352ce9d334eac02 Signed-off-by: Kilian Krause Reviewed-on: https://review.coreboot.org/c/coreboot/+/91200 Reviewed-by: Mario Scheithauer Tested-by: build bot (Jenkins) --- src/mainboard/siemens/mc_ehl/romstage_fsp_params.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/src/mainboard/siemens/mc_ehl/romstage_fsp_params.c b/src/mainboard/siemens/mc_ehl/romstage_fsp_params.c index d386d756a6..1e818345ba 100644 --- a/src/mainboard/siemens/mc_ehl/romstage_fsp_params.c +++ b/src/mainboard/siemens/mc_ehl/romstage_fsp_params.c @@ -38,8 +38,10 @@ void mainboard_memory_init_params(FSPM_UPD *memupd) /* Enable Row-Hammer prevention */ memupd->FspmConfig.RhPrevention = 1; - if (CONFIG(BOARD_SIEMENS_MC_EHL1)) { - /* Allow writes to EEPROM addresses 0x50..0x57. */ + if (CONFIG(BOARD_SIEMENS_MC_EHL1) || CONFIG(BOARD_SIEMENS_MC_EHL8)) { + /* Disable write protection for SMBus addresses 0x50-0x57. + * mc_ehl1: Writable SPD EEPROM + * mc_ehl8: RTC at address 0x52 */ memupd->FspmConfig.SmbusSpdWriteDisable = 0; } }