erebion/coreboot
1
0
Fork 0
Code Issues Pull requests Projects Releases Packages Wiki Activity Actions

ACPI: Replace uses of CBMEM_ID_ACPI_GNVS

Browse source 
These are the simple cbmem_find() cases. Also drop the redundant
error messages.

Change-Id: I78e5445eb09c322ff94fe4f65345eb2997bd10ef
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42361
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Nico Huber <nico.h@gmx.de>
This commit is contained in:
Kyösti Mälkki 2020-06-14 12:01:58 +03:00 • committed by Patrick Georgi
commit 5daa1d3898
18 changed files with 47 additions and 62 deletions
Download patch file Download diff file Expand all files Collapse all files

8
src/soc/intel/baytrail/lpe.c
View file

@ -2,7 +2,7 @@
#include <device/mmio.h>
#include <device/pci_ops.h>
#include <cbmem.h>
#include <acpi/acpi_gnvs.h>
#include <console/console.h>
#include <device/device.h>
#include <device/pci.h>
@ -53,11 +53,9 @@ static void lpe_enable_acpi_mode(struct device *dev)
global_nvs_t *gnvs;
/* Find ACPI NVS to update BARs */
gnvs = (global_nvs_t *)cbmem_find(CBMEM_ID_ACPI_GNVS);
if (!gnvs) {
printk(BIOS_ERR, "Unable to locate Global NVS\n");
gnvs = acpi_get_gnvs();
if (!gnvs)
return;
}
/* Save BAR0, BAR1, and firmware base to ACPI NVS */
assign_device_nvs(dev, &gnvs->dev.lpe_bar0, PCI_BASE_ADDRESS_0);

8
src/soc/intel/baytrail/lpss.c
View file

@ -1,7 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <stdint.h>
#include <cbmem.h>
#include <acpi/acpi_gnvs.h>
#include <console/console.h>
#include <device/device.h>
#include <device/pci.h>
@ -31,11 +31,9 @@ static void dev_enable_acpi_mode(struct device *dev, int iosf_reg,
global_nvs_t *gnvs;
/* Find ACPI NVS to update BARs */
gnvs = (global_nvs_t *)cbmem_find(CBMEM_ID_ACPI_GNVS);
if (!gnvs) {
printk(BIOS_ERR, "Unable to locate Global NVS\n");
gnvs = acpi_get_gnvs();
if (!gnvs)
return;
}
/* Save BAR0 and BAR1 to ACPI NVS */
bar = find_resource(dev, PCI_BASE_ADDRESS_0);

8
src/soc/intel/baytrail/scc.c
View file

@ -1,7 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <cbmem.h>
#include <acpi/acpi_gnvs.h>
#include <console/console.h>
#include <device/device.h>
#include <device/pci.h>
@ -84,11 +84,9 @@ void scc_enable_acpi_mode(struct device *dev, int iosf_reg, int nvs_index)
global_nvs_t *gnvs;
/* Find ACPI NVS to update BARs */
gnvs = (global_nvs_t *)cbmem_find(CBMEM_ID_ACPI_GNVS);
if (!gnvs) {
printk(BIOS_ERR, "Unable to locate Global NVS\n");
gnvs = acpi_get_gnvs();
if (!gnvs)
return;
}
/* Save BAR0 and BAR1 to ACPI NVS */
bar = find_resource(dev, PCI_BASE_ADDRESS_0);

8
src/soc/intel/braswell/lpe.c
View file

@ -2,7 +2,7 @@
#include <device/mmio.h>
#include <device/pci_ops.h>
#include <cbmem.h>
#include <acpi/acpi_gnvs.h>
#include <console/console.h>
#include <device/device.h>
#include <device/pci.h>
@ -56,11 +56,9 @@ static void lpe_enable_acpi_mode(struct device *dev)
global_nvs_t *gnvs;
/* Find ACPI NVS to update BARs */
gnvs = cbmem_find(CBMEM_ID_ACPI_GNVS);
if (!gnvs) {
printk(BIOS_ERR, "Unable to locate Global NVS\n");
gnvs = acpi_get_gnvs();
if (!gnvs)
return;
}
/* Save BAR0, BAR1, and firmware base to ACPI NVS */
assign_device_nvs(dev, &gnvs->dev.lpe_bar0, PCI_BASE_ADDRESS_0);

8
src/soc/intel/braswell/lpss.c
View file

@ -1,7 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <stdint.h>
#include <cbmem.h>
#include <acpi/acpi_gnvs.h>
#include <console/console.h>
#include <device/device.h>
#include <device/pci.h>
@ -30,11 +30,9 @@ static void dev_enable_acpi_mode(struct device *dev, int iosf_reg, int nvs_index
global_nvs_t *gnvs;
/* Find ACPI NVS to update BARs */
gnvs = cbmem_find(CBMEM_ID_ACPI_GNVS);
if (!gnvs) {
printk(BIOS_ERR, "Unable to locate Global NVS\n");
gnvs = acpi_get_gnvs();
if (!gnvs)
return;
}
/* Save BAR0 and BAR1 to ACPI NVS */
bar = find_resource(dev, PCI_BASE_ADDRESS_0);

8
src/soc/intel/braswell/scc.c
View file

@ -1,7 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <cbmem.h>
#include <acpi/acpi_gnvs.h>
#include <console/console.h>
#include <device/device.h>
#include <device/pci.h>
@ -18,11 +18,9 @@ void scc_enable_acpi_mode(struct device *dev, int iosf_reg, int nvs_index)
__FILE__, __func__, dev_name(dev), iosf_reg, nvs_index);
/* Find ACPI NVS to update BARs */
gnvs = cbmem_find(CBMEM_ID_ACPI_GNVS);
if (!gnvs) {
printk(BIOS_ERR, "Unable to locate Global NVS\n");
gnvs = acpi_get_gnvs();
if (!gnvs)
return;
}
/* Save BAR0 and BAR1 to ACPI NVS */
bar = find_resource(dev, PCI_BASE_ADDRESS_0);

8
src/soc/intel/broadwell/adsp.c
View file

@ -1,6 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <cbmem.h>
#include <acpi/acpi_gnvs.h>
#include <console/console.h>
#include <device/device.h>
#include <device/pci.h>
@ -85,11 +85,9 @@ static void adsp_init(struct device *dev)
printk(BIOS_INFO, "ADSP: Enable ACPI Mode IRQ3\n");
/* Find ACPI NVS to update BARs */
gnvs = (global_nvs_t *)cbmem_find(CBMEM_ID_ACPI_GNVS);
if (!gnvs) {
printk(BIOS_ERR, "Unable to locate Global NVS\n");
gnvs = acpi_get_gnvs();
if (!gnvs)
return;
}
/* Save BAR0 and BAR1 to ACPI NVS */
gnvs->dev.bar0[SIO_NVS_ADSP] = (u32)bar0->base;

8
src/soc/intel/broadwell/serialio.c
View file

@ -2,7 +2,7 @@
#include <device/mmio.h>
#include <device/pci_ops.h>
#include <cbmem.h>
#include <acpi/acpi_gnvs.h>
#include <console/console.h>
#include <device/device.h>
#include <device/pci.h>
@ -236,11 +236,9 @@ static void serialio_init(struct device *dev)
global_nvs_t *gnvs;
/* Find ACPI NVS to update BARs */
gnvs = (global_nvs_t *)cbmem_find(CBMEM_ID_ACPI_GNVS);
if (!gnvs) {
printk(BIOS_ERR, "Unable to locate Global NVS\n");
gnvs = acpi_get_gnvs();
if (!gnvs)
return;
}
/* Save BAR0 and BAR1 to ACPI NVS */
gnvs->dev.bar0[sio_index] = (u32)bar0->base;

4
src/soc/intel/common/acpi_wake_source.c
View file

@ -1,8 +1,8 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <acpi/acpi.h>
#include <acpi/acpi_gnvs.h>
#include <bootstate.h>
#include <cbmem.h>
#include <console/console.h>
#include <soc/nvs.h>
#include <stdint.h>
@ -16,7 +16,7 @@ __weak int soc_fill_acpi_wake(uint32_t *pm1, uint32_t **gpe0)
/* Save wake source data for ACPI _SWS methods in NVS */
static void acpi_save_wake_source(void *unused)
{
global_nvs_t *gnvs = cbmem_find(CBMEM_ID_ACPI_GNVS);
global_nvs_t *gnvs = acpi_get_gnvs();
uint32_t pm1, *gpe0;
int gpe_reg, gpe_reg_count;
int reg_size = sizeof(uint32_t) * 8;

3
src/soc/intel/common/block/acpi/acpi.c
View file

@ -6,6 +6,7 @@
#include <bootstate.h>
#include <cbmem.h>
#include <cf9_reset.h>
#include <acpi/acpi_gnvs.h>
#include <console/console.h>
#include <cpu/intel/turbo.h>
#include <cpu/x86/msr.h>
@ -456,7 +457,7 @@ void generate_cpu_entries(const struct device *device)
/* Save wake source data for ACPI _SWS methods in NVS */
static void acpi_save_wake_source(void *unused)
{
global_nvs_t *gnvs = cbmem_find(CBMEM_ID_ACPI_GNVS);
global_nvs_t *gnvs = acpi_get_gnvs();
uint32_t pm1, *gpe0;
int gpe_reg, gpe_reg_count;
int reg_size = sizeof(uint32_t) * 8;

4
src/soc/intel/common/block/uart/uart.c
View file

@ -1,7 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <acpi/acpi.h>
#include <cbmem.h>
#include <acpi/acpi_gnvs.h>
#include <console/uart.h>
#include <device/device.h>
#include <device/pci.h>
@ -167,7 +167,7 @@ static void uart_read_resources(struct device *dev)
*/
static bool pch_uart_init_debug_controller_on_resume(void)
{
global_nvs_t *gnvs = cbmem_find(CBMEM_ID_ACPI_GNVS);
global_nvs_t *gnvs = acpi_get_gnvs();
if (gnvs)
return !!gnvs->uior;

4
src/soc/intel/common/nhlt.c
View file

@ -1,6 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <cbmem.h>
#include <acpi/acpi_gnvs.h>
#include <nhlt.h>
#include <soc/nvs.h>
@ -15,7 +15,7 @@ uintptr_t nhlt_soc_serialize_oem_overrides(struct nhlt *nhlt,
{
global_nvs_t *gnvs;
gnvs = cbmem_find(CBMEM_ID_ACPI_GNVS);
gnvs = acpi_get_gnvs();
if (gnvs == NULL)
return acpi_addr;