From 5d46eecbc8a471cb4d8f32a00a152a8360db7475 Mon Sep 17 00:00:00 2001 From: Bora Guvendik Date: Thu, 23 Oct 2025 11:06:18 -0700 Subject: [PATCH] mb/google/fatcat: Update frequency for SaGv work point 4 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Update SaGv work point 4 frequency value as per recommendation from power and performance team. BUG=b:461762075 TEST=Boot to OS on fatcat board, verified performance improvements and frequency setting. Change-Id: Ic4dfe6bf5a441b491a27e952010a43d4f7a68af5 Signed-off-by: Bora Guvendik Reviewed-on: https://review.coreboot.org/c/coreboot/+/89693 Tested-by: build bot (Jenkins) Reviewed-by: Pranava Y N Reviewed-by: Jérémy Compostella Reviewed-by: Subrata Banik --- .../google/fatcat/variants/baseboard/fatcat/devicetree.cb | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/src/mainboard/google/fatcat/variants/baseboard/fatcat/devicetree.cb b/src/mainboard/google/fatcat/variants/baseboard/fatcat/devicetree.cb index 6ccd7c2e18..0f74bc79b8 100644 --- a/src/mainboard/google/fatcat/variants/baseboard/fatcat/devicetree.cb +++ b/src/mainboard/google/fatcat/variants/baseboard/fatcat/devicetree.cb @@ -48,9 +48,11 @@ chip soc/intel/pantherlake register "sagv_freq_mhz[2]" = "6400" register "sagv_gear[2]" = "GEAR_4" - register "sagv_freq_mhz[3]" = "6800" + register "sagv_freq_mhz[3]" = "7467" register "sagv_gear[3]" = "GEAR_4" + register "max_dram_speed_mts" = "7467" + # Enable s0ix register "s0ix_enable" = "true"