erebion/coreboot
1
0
Fork 0
Code Issues Pull requests Projects Releases Packages Wiki Activity Actions

sio/nuvoton: Add NCT6796D as a copy of NCT6791D

Browse source 
The -96D is an updated version of the -91D and has additional LDNs.
This initial commit is a clone of the -91D with strings changed;
additional functionality will be added in subsequent commits.

TEST=tested with out-of-tree board Erying SRMJ4

Change-Id: I8f67c999f4076aaca52c93060a6a461dd9bcc62f
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/91100
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Reviewed-by: Alicja Michalska <ahplka19@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Matt DeVillier 2026-02-04 10:23:37 -06:00
commit 5cb2fa1dc0
5 changed files with 163 additions and 0 deletions
Download patch file Download diff file Expand all files Collapse all files

1
src/superio/nuvoton/Makefile.mk
View file

@ -13,4 +13,5 @@ subdirs-$(CONFIG_SUPERIO_NUVOTON_NCT6687D) += nct6687d
subdirs-$(CONFIG_SUPERIO_NUVOTON_NCT6776) += nct6776
subdirs-$(CONFIG_SUPERIO_NUVOTON_NCT6779D) += nct6779d
subdirs-$(CONFIG_SUPERIO_NUVOTON_NCT6791D) += nct6791d
subdirs-$(CONFIG_SUPERIO_NUVOTON_NCT6796D) += nct6796d
subdirs-$(CONFIG_SUPERIO_NUVOTON_NPCD378) += npcd378

5
src/superio/nuvoton/nct6796d/Kconfig Normal file
View file

@ -0,0 +1,5 @@
# SPDX-License-Identifier: GPL-2.0-only
config SUPERIO_NUVOTON_NCT6796D
bool
select SUPERIO_NUVOTON_COMMON_PRE_RAM

5
src/superio/nuvoton/nct6796d/Makefile.mk Normal file
View file

@ -0,0 +1,5 @@
# SPDX-License-Identifier: GPL-2.0-only
ramstage-$(CONFIG_SUPERIO_NUVOTON_NCT6796D) += superio.c
ramstage-$(CONFIG_SUPERIO_NUVOTON_NCT6796D) += ../../common/ssdt.c
ramstage-$(CONFIG_SUPERIO_NUVOTON_NCT6796D) += ../../common/generic.c

44
src/superio/nuvoton/nct6796d/nct6796d.h Normal file
View file

@ -0,0 +1,44 @@
/* SPDX-License-Identifier: GPL-2.0-or-later */
#ifndef SUPERIO_NUVOTON_NCT6796D_H
#define SUPERIO_NUVOTON_NCT6796D_H
/* Logical Device Numbers (LDN). */
#define NCT6796D_PP 0x01 /* Parallel port */
#define NCT6796D_SP1 0x02 /* UART A */
#define NCT6796D_SP2 0x03 /* UART B, IR */
#define NCT6796D_KBC 0x05 /* Keyboard Controller */
#define NCT6796D_CIR 0x06 /* Consumer IR */
#define NCT6796D_GPIO678 0x07 /* GPIO 6, 7 & 8 */
#define NCT6796D_WDT1_WDTMEM_GPIO01 0x08 /* WDT1, WDT_MEM, GPIO 0 & 1 */
#define NCT6796D_GPIO2345 0x09 /* GPIO 2, 3, 4 & 5 */
#define NCT6796D_ACPI 0x0A /* ACPI */
#define NCT6796D_HWM_FPLED 0x0B /* HW Monitor, Front Panel LED */
#define NCT6796D_BCLK_WDT2_WDTMEM 0x0D /* BCLK, WDT2, WDT_MEM */
#define NCT6796D_CIRWUP 0x0E /* CIR Wake-Up */
#define NCT6796D_GPIO_PP_OD 0x0F /* GPIO Push-Pull/Open-Drain */
#define NCT6796D_PORT80 0x14 /* Port 80 UART */
#define NCT6796D_DS 0x16 /* Deep Sleep */
/* Virtual LDNs */
#define NCT6796D_WDT1 ((0 << 8) | NCT6796D_WDT1_WDTMEM_GPIO01)
#define NCT6796D_WDTMEM ((4 << 8) | NCT6796D_WDT1_WDTMEM_GPIO01)
#define NCT6796D_GPIOBASE ((3 << 8) | NCT6796D_WDT1_WDTMEM_GPIO01)
#define NCT6796D_GPIO0 ((1 << 8) | NCT6796D_WDT1_WDTMEM_GPIO01)
#define NCT6796D_GPIO1 ((7 << 8) | NCT6796D_WDT1_WDTMEM_GPIO01)
#define NCT6796D_GPIO2 ((0 << 8) | NCT6796D_GPIO2345)
#define NCT6796D_GPIO3 ((1 << 8) | NCT6796D_GPIO2345)
#define NCT6796D_GPIO4 ((2 << 8) | NCT6796D_GPIO2345)
#define NCT6796D_GPIO5 ((3 << 8) | NCT6796D_GPIO2345)
#define NCT6796D_GPIO6 ((0 << 8) | NCT6796D_GPIO678)
#define NCT6796D_GPIO7 ((1 << 8) | NCT6796D_GPIO678)
#define NCT6796D_GPIO8 ((2 << 8) | NCT6796D_GPIO678)
#define NCT6796D_DS5 ((0 << 8) | NCT6796D_DS)
#define NCT6796D_DS3 ((1 << 8) | NCT6796D_DS)
#define NCT6796D_PCHDSW ((3 << 8) | NCT6796D_DS)
#define NCT6796D_DSWWOPT ((4 << 8) | NCT6796D_DS)
#define NCT6796D_DS3OPT ((5 << 8) | NCT6796D_DS)
#define NCT6796D_DSDSS ((6 << 8) | NCT6796D_DS)
#define NCT6796D_DSPU ((7 << 8) | NCT6796D_DS)
#endif /* SUPERIO_NUVOTON_NCT6796D_H */

108
src/superio/nuvoton/nct6796d/superio.c Normal file
View file

@ -0,0 +1,108 @@
/* SPDX-License-Identifier: GPL-2.0-or-later */
#include <device/device.h>
#include <device/pnp.h>
#include <pc80/keyboard.h>
#include <superio/conf_mode.h>
#include <superio/common/ssdt.h>
#include <acpi/acpi.h>
#include "nct6796d.h"
static void nct6796d_init(struct device *dev)
{
if (!dev->enabled)
return;
switch (dev->path.pnp.device) {
case NCT6796D_KBC:
pc_keyboard_init(NO_AUX_DEVICE);
break;
}
}
#if CONFIG(HAVE_ACPI_TABLES)
/* Provide ACPI HIDs for generic Super I/O SSDT */
static const char *nct6796d_acpi_hid(const struct device *dev)
{
if ((dev->path.type != DEVICE_PATH_PNP) ||
(dev->path.pnp.port == 0) ||
((dev->path.pnp.device & 0xff) > NCT6796D_DS))
return NULL;
switch (dev->path.pnp.device & 0xff) {
case NCT6796D_SP1:
__fallthrough;
case NCT6796D_SP2:
return ACPI_HID_COM;
case NCT6796D_KBC:
return ACPI_HID_KEYBOARD;
default:
return ACPI_HID_PNP;
}
}
#endif
static struct device_operations ops = {
.read_resources = pnp_read_resources,
.set_resources = pnp_set_resources,
.enable_resources = pnp_enable_resources,
.enable = pnp_alt_enable,
.init = nct6796d_init,
.ops_pnp_mode = &pnp_conf_mode_8787_aa,
#if CONFIG(HAVE_ACPI_TABLES)
.acpi_fill_ssdt = superio_common_fill_ssdt_generator,
.acpi_name = superio_common_ldn_acpi_name,
.acpi_hid = nct6796d_acpi_hid,
#endif
};
static struct pnp_info pnp_dev_info[] = {
{ NULL, NCT6796D_PP, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0,
0x0ff8, },
{ NULL, NCT6796D_SP1, PNP_IO0 | PNP_IRQ0,
0x0ff8, },
{ NULL, NCT6796D_SP2, PNP_IO0 | PNP_IRQ0,
0x0ff8, },
{ NULL, NCT6796D_KBC, PNP_IO0 | PNP_IO1 | PNP_IRQ0 | PNP_IRQ1,
0x0fff, 0x0fff, },
{ NULL, NCT6796D_CIR, PNP_IO0 | PNP_IRQ0,
0x0ff8, },
{ NULL, NCT6796D_ACPI},
{ NULL, NCT6796D_HWM_FPLED, PNP_IO0 | PNP_IO1 | PNP_IRQ0,
0x0ffe, 0x0ffe, },
{ NULL, NCT6796D_BCLK_WDT2_WDTMEM},
{ NULL, NCT6796D_CIRWUP, PNP_IO0 | PNP_IRQ0,
0x0ff8, },
{ NULL, NCT6796D_GPIO_PP_OD},
{ NULL, NCT6796D_PORT80},
{ NULL, NCT6796D_WDT1},
{ NULL, NCT6796D_WDTMEM},
{ NULL, NCT6796D_GPIOBASE, PNP_IO0,
0x0ff8, },
{ NULL, NCT6796D_GPIO0},
{ NULL, NCT6796D_GPIO1},
{ NULL, NCT6796D_GPIO2},
{ NULL, NCT6796D_GPIO3},
{ NULL, NCT6796D_GPIO4},
{ NULL, NCT6796D_GPIO5},
{ NULL, NCT6796D_GPIO6},
{ NULL, NCT6796D_GPIO7},
{ NULL, NCT6796D_GPIO8},
{ NULL, NCT6796D_DS5},
{ NULL, NCT6796D_DS3},
{ NULL, NCT6796D_PCHDSW},
{ NULL, NCT6796D_DSWWOPT},
{ NULL, NCT6796D_DS3OPT},
{ NULL, NCT6796D_DSDSS},
{ NULL, NCT6796D_DSPU},
};
static void enable_dev(struct device *dev)
{
pnp_enable_devices(dev, &ops, ARRAY_SIZE(pnp_dev_info), pnp_dev_info);
}
struct chip_operations superio_nuvoton_nct6796d_ops = {
.name = "NUVOTON NCT6796D Super I/O",
.enable_dev = enable_dev,
};