mb/google/fatcat/var/lapis: Add cs42l43 and cs35l56 Soundwire links
Enable the CS42L43 codec on SoundWire link 3 and the CS35L56
amplifiers on SoundWire link 2.
Scope (\_SB.PCI0.HDAS.SNDW)
{
Device (SW30)
{
Name (_ADR, 0x00033001FA424301) // _ADR: Address
Name (_DDN, "Headset Codec") // _DDN: DOS Device Name
Name (_SUB, "1337") // _SUB: Subsystem ID
...
{
Device (SW20)
{
Name (_ADR, 0x00023001FA355601) // _ADR: Address
Name (_DDN, "Left Speaker Amp") // _DDN: DOS Device Name
Name (_SUB, "12345678") // _SUB: Subsystem ID
...
Device (SW21)
{
Name (_ADR, 0x00023101FA355601) // _ADR: Address
Name (_DDN, "Right Speaker Amp") // _DDN: DOS Device Name
Name (_SUB, "12345678") // _SUB: Subsystem ID
...
BUG=b:444122406, b:444302600
TES=emerge-lapis coreboot
Change-Id: Ic73d705655bdc0a4a8140feafa28aceb2fc25ad3
Signed-off-by: Mac Chiang <mac.chiang@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/89345
Reviewed-by: Kapil Porwal <kapilporwal@google.com>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-by: Subrata Banik <subratabanik@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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1 changed files with 26 additions and 0 deletions
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@ -443,6 +443,32 @@ chip soc/intel/pantherlake
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end
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end #Touchpenal
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device ref hda on
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chip drivers/intel/soundwire
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device generic 0 on
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chip drivers/soundwire/cs42l43
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# SoundWire Link 3 ID 0
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register "desc" = ""Headset Codec""
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register "sub" = ""1337""
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device generic 3.0 on end
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end
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chip drivers/soundwire/cs35l56
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# SoundWire Link 2 ID 0
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register "desc" = ""Left Speaker Amp""
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register "part_id" = "MIPI_DEV_ID_CIRRUS_CS35L56"
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register "sub" = ""12345678""
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device generic 2.0 on end
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end
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chip drivers/soundwire/cs35l56
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# SoundWire Link 2 ID 1
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register "desc" = ""Right Speaker Amp""
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register "part_id" = "MIPI_DEV_ID_CIRRUS_CS35L56"
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register "sub" = ""12345678""
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device generic 2.1 on end
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end
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end
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end
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end # SNDW
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device ref i2c0 on end
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device ref i2c3 on
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chip drivers/i2c/tpm
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