diff --git a/src/arch/x86/smbios.c b/src/arch/x86/smbios.c index 97d5f24256..a59998e3c0 100644 --- a/src/arch/x86/smbios.c +++ b/src/arch/x86/smbios.c @@ -176,17 +176,40 @@ int smbios_write_type4(unsigned long *current, int handle) if (cpu_have_cpuid()) { res = cpuid(1); + if (((res.ebx >> 16) & 0xff) > 1) + characteristics |= PROCESSOR_MULTI_CORE; + if ((res.ecx) & BIT(5)) - characteristics |= BIT(6); /* BIT6: Enhanced Virtualization */ + characteristics |= PROCESSOR_ENHANCED_VIRTUALIZATION; if ((res.edx) & BIT(28)) - characteristics |= BIT(4); /* BIT4: Hardware Thread */ + characteristics |= PROCESSOR_HARDWARE_THREAD; + + if (CONFIG(SOC_INTEL_COMMON) && cpu_cpuid_extended_level() >= 6) { + res = cpuid(6); + if ((res.eax) & BIT(7)) /* Intel HWP*/ + characteristics |= PROCESSOR_POWER_PERFORMANCE_CONTROL; + } if (cpu_cpuid_extended_level() >= 0x80000001) { res = cpuid(0x80000001); if ((res.edx) & BIT(20)) - characteristics |= BIT(5); /* BIT5: Execute Protection */ + characteristics |= PROCESSOR_EXECUTE_PROTECTION; + + if ((res.edx) & BIT(29)) + characteristics |= PROCESSOR_64BIT_CAPABLE; + + /* AMD SVM */ + if (CONFIG(SOC_AMD_COMMON) && (res.ecx) & BIT(2)) + characteristics |= PROCESSOR_ENHANCED_VIRTUALIZATION; + } + + if (CONFIG(SOC_AMD_COMMON) && cpu_cpuid_extended_level() >= 0x80000007) { + res = cpuid(0x80000007); + + if ((res.edx) & BIT(7)) /* Hardware P-state control */ + characteristics |= PROCESSOR_POWER_PERFORMANCE_CONTROL; } } t->processor_characteristics = characteristics | smbios_processor_characteristics(); diff --git a/src/include/smbios.h b/src/include/smbios.h index fd44e098d4..353c3cf40b 100644 --- a/src/include/smbios.h +++ b/src/include/smbios.h @@ -597,6 +597,9 @@ enum smbios_processor_upgrade_field { /* defines for processor characteristics */ #define PROCESSOR_64BIT_CAPABLE (1 << 2) #define PROCESSOR_MULTI_CORE (1 << 3) +#define PROCESSOR_HARDWARE_THREAD (1 << 4) +#define PROCESSOR_EXECUTE_PROTECTION (1 << 5) +#define PROCESSOR_ENHANCED_VIRTUALIZATION (1 << 6) #define PROCESSOR_POWER_PERFORMANCE_CONTROL (1 << 7) /* defines for supported_sram_type/current_sram_type */