Fixes for 440gx and bx

add ide-spinup patch
add reset_test.inc for smp on 440gx

src/kernel_patches/README

@@ -8,4 +8,7 @@ It has been tested on 2.4.0-test6 kernels.
 For SiS630 users: Use the linux-2.4.0-test12-sis630-sisfb_lite.patch ONLY.
 There is also a sameple kernel configuration file config-2.4.0-test12.sis.
 This will build a kernel that works with LinuxBIOS. 
+---
+For IDE spinup patch you can use the ide-spinup.patch. This will ONLY add 
+a patch to force IDE controllers on, and wait for hda to spin up
 

src/kernel_patches/ide-spinup.patch

@@ -0,0 +1,66 @@
+diff -urN linux-2.4.7-official/arch/i386/Linuxbios.in linux-2.4.7-linuxbios/arch/i386/Linuxbios.in
+--- linux-2.4.7-official/arch/i386/Linuxbios.in	Thu Jan  1 08:00:00 1970
++++ linux-2.4.7-linuxbios/arch/i386/Linuxbios.in	Fri Jul 27 11:19:47 2001
+@@ -0,0 +1,5 @@
++mainmenu_option next_comment
++comment 'Linuxbios Options'
++bool 'Force IDE Controllers on?' CONFIG_LINUXBIOS_FORCE_IDE_CONTROLLER_ON
++bool 'Wait for HDA to spin up?'  CONFIG_LINUXBIOS_WAIT_HDA_SPINUP
++endmenu
+diff -urN linux-2.4.7-official/arch/i386/config.in linux-2.4.7-linuxbios/arch/i386/config.in
+--- linux-2.4.7-official/arch/i386/config.in	Mon Jul 16 07:15:44 2001
++++ linux-2.4.7-linuxbios/arch/i386/config.in	Fri Jul 27 11:19:47 2001
+@@ -391,3 +391,13 @@
+ #bool 'Debug kmalloc/kfree' CONFIG_DEBUG_MALLOC
+ bool 'Magic SysRq key' CONFIG_MAGIC_SYSRQ
+ endmenu
++
++mainmenu_option next_comment
++comment 'LinuxBIOS'
++
++tristate 'LinuxBIOS Support' CONFIG_LINUXBIOS
++if [ "$CONFIG_LINUXBIOS" != "n" ]; then
++   source arch/i386/Linuxbios.in
++fi
++
++endmenu
+diff -urN linux-2.4.7-official/drivers/ide/ide-pci.c linux-2.4.7-linuxbios/drivers/ide/ide-pci.c
+--- linux-2.4.7-official/drivers/ide/ide-pci.c	Thu Jun 28 05:12:04 2001
++++ linux-2.4.7-linuxbios/drivers/ide/ide-pci.c	Fri Jul 27 11:19:48 2001
+@@ -628,8 +628,19 @@
+ 	for (port = 0; port <= 1; ++port) {
+ 		unsigned long base = 0, ctl = 0;
+ 		ide_pci_enablebit_t *e = &(d->enablebits[port]);
++#ifndef CONFIG_LINUXBIOS_FORCE_IDE_CONTROLLER_ON
+ 		if (e->reg && (pci_read_config_byte(dev, e->reg, &tmp) || (tmp & e->mask) != e->val))
+ 			continue;	/* port not enabled */
++#else
++		/* force 'em on! */
++ 		if (e->reg) {
++		  pci_read_config_byte(dev, e->reg, &tmp);
++		  tmp |= e->val;
++		  pci_write_config_byte(dev, e->reg, tmp);
++		  printk("%s: LINUXBIOS, so Jammed the enable on!\n", 
++			 d->name);
++ 		}
++#endif
+ 		if (IDE_PCI_DEVID_EQ(d->devid, DEVID_HPT366) && (port) && (class_rev < 0x03))
+ 			return;
+ 		if ((dev->class >> 8) != PCI_CLASS_STORAGE_IDE || (dev->class & (port ? 4 : 1)) != 0) {
+diff -urN linux-2.4.7-official/drivers/ide/ide-probe.c linux-2.4.7-linuxbios/drivers/ide/ide-probe.c
+--- linux-2.4.7-official/drivers/ide/ide-probe.c	Mon Mar 19 01:25:02 2001
++++ linux-2.4.7-linuxbios/drivers/ide/ide-probe.c	Fri Jul 27 11:19:48 2001
+@@ -310,6 +310,13 @@
+ 		if ((drive->media != ide_disk) && (cmd == WIN_IDENTIFY))
+ 			return 4;
+ 	}
++#ifdef CONFIG_LINUXBIOS_WAIT_HDA_SPINUP
++	if (! strncmp(drive->name, "hda", 3)) {
++	  printk("jamming drive present for %s\n", drive->name);
++	  drive->present = 1;
++	}
++#endif
++
+ #ifdef DEBUG
+ 	printk("probing for %s: present=%d, media=%d, probetype=%s\n",
+ 		drive->name, drive->present, drive->media,

src/mainboard/intel/l440gx/Config

@@ -1,8 +1,10 @@
+
 arch i386
 mainboardinit cpu/i386/entry16.inc
 ldscript cpu/i386/entry16.lds
 mainboardinit cpu/i386/reset16.inc
 ldscript cpu/i386/reset16.lds
+mainboardinit northbridge/intel/440gx/reset_test.inc
 
 mainboardinit superio/NSC/pc87309/setup_serial.inc
 mainboardinit pc80/serial.inc

src/northbridge/intel/440bx/raminit.inc

@@ -109,11 +109,11 @@ jmp intel_440_out
 #define SET_DRAMC						\
 	CS_WRITE_BYTE(0x57, 0x8)				\
 
-#define SET_PAM \
-	/* PAM - Programmable Attribute Map Registers */	\
+	/* PAM - Programmable Attribute Map Registers */	
 	/* Ideally we want to enable all of these as DRAM and teach
 	 * linux it is o.k. to use them...
 	 */
+#define SET_PAM \
 	CS_WRITE_BYTE(0x59, 0x00)				; \
 	CS_WRITE_BYTE(0x5a, 0x00)				; \
 	CS_WRITE_BYTE(0x5b, 0x00)				; \

src/northbridge/intel/440gx/reset_test.inc

@@ -0,0 +1,23 @@
+       /* If I have already booted once skip a bunch of initialization */
+
+#if 0
+       /* To see if I have already booted I check to see if memory has
+        * been enabled.  In this case by reading the memory size register.
+        * This gets set part way through the memory initialization but
+        * it should be fine for this purpose.
+        */
+       movl    $0x67, %eax
+       PCI_READ_CONFIG_BYTE
+       testb   %al, %al
+       jnz     __cpu_reset
+#endif
+#if 1
+       /* To see if I have already booted I check to see if memory has
+        * been enabled.  In this case by seeing if memory refresh
+        * hass ben enabled.
+        */
+       movl    $0x57, %eax
+       PCI_READ_CONFIG_BYTE
+       testb   $0x7, %al
+       jnz     __cpu_reset
+#endif