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UPSTREAM: soc/intel/skylake: Enable PARALLEL_MP_AP_WORK

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With change a4b11e5c90 (soc/intel/skylake: Perform CPU MP Init
before FSP-S Init) to perform CPU MP init before FSP-S init, MTRR
programming was moved to be performed after CPU init is done. However,
in order to allow callbacks after MP init, PARALLEL_MP_AP_WORK needs
to be enabled. Since this option was not selected, MTRR programming
always failed in ramstage for Skylake / Kaby Lake mainboards.

BUG=b:36656098
TEST=Verified 2500+ cycles of suspend resume on poppy.

Change-Id: I1ca205254163b692221ad9178ddb9317e2731387
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: a585358f9b
Original-Change-Id: I22a8f6ac90ba35075ff97dd57bab66c129f3e771
Original-Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Original-Reviewed-on: https://review.coreboot.org/19608
Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/501151
This commit is contained in:
Furquan Shaikh 2017-05-06 12:40:15 -07:00 • committed by chrome-bot
commit 5acab77046
1 changed files with 1 additions and 0 deletions
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src/soc/intel/skylake/Kconfig
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@ -38,6 +38,7 @@ config CPU_SPECIFIC_OPTIONS
select NO_FIXED_XIP_ROM_SIZE
select MRC_SETTINGS_PROTECT
select PARALLEL_MP
select PARALLEL_MP_AP_WORK
select PCIEXP_ASPM
select PCIEXP_COMMON_CLOCK
select PCIEXP_CLK_PM