UPSTREAM: mb/ga-g41m-es2l: Correctly configure PCI IRQ in ACPI

Obtained from vendor bios DSDT, under "Device (HUB0),
Name (_ADR, 0x001E0000)".

The schematics also indicate that the INTA-D are hardwired to these
PIRQ lines.

BUG=None
BRANCH=None
TEST=None

Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/17099
Tested-by: build bot (Jenkins)
Reviewed-by: Nico Huber <nico.h@gmx.de>

Change-Id: I8e1c6cb986a2b345a5e1fddd454c7fb12fb8256a
Reviewed-on: https://chromium-review.googlesource.com/415046
Commit-Ready: Aaron Durbin <adurbin@chromium.org>
Tested-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
This commit is contained in:
Arthur Heymans 2016-10-24 01:43:17 +02:00 committed by chrome-bot
commit 587df548ba

View file

@ -19,16 +19,26 @@
If (PICM) {
Return (Package() {
Package() { 0x001effff, 0, 0, 17},
Package() { 0x001effff, 1, 0, 20},
Package() { 0x001effff, 2, 0, 16},
Package() { 0x001effff, 3, 0, 16},
Package() { 0x0000ffff, 0, 0, 20},
Package() { 0x0000ffff, 1, 0, 19},
Package() { 0x0000ffff, 2, 0, 18},
Package() { 0x0000ffff, 3, 0, 16},
Package() { 0x0001ffff, 0, 0, 19},
Package() { 0x0001ffff, 1, 0, 18},
Package() { 0x0001ffff, 2, 0, 16},
Package() { 0x0001ffff, 3, 0, 20},
})
} Else {
Return (Package() {
Package() { 0x001effff, 0, \_SB.PCI0.LPCB.LNKB, 0},
Package() { 0x001effff, 1, \_SB.PCI0.LPCB.LNKE, 0},
Package() { 0x001effff, 2, \_SB.PCI0.LPCB.LNKA, 0},
Package() { 0x001effff, 3, \_SB.PCI0.LPCB.LNKA, 0},
Package() { 0x0000ffff, 0, \_SB.PCI0.LPCB.LNKE, 0},
Package() { 0x0000ffff, 1, \_SB.PCI0.LPCB.LNKD, 0},
Package() { 0x0000ffff, 2, \_SB.PCI0.LPCB.LNKC, 0},
Package() { 0x0000ffff, 3, \_SB.PCI0.LPCB.LNKA, 0},
Package() { 0x0001ffff, 0, \_SB.PCI0.LPCB.LNKD, 0},
Package() { 0x0001ffff, 1, \_SB.PCI0.LPCB.LNKC, 0},
Package() { 0x0001ffff, 2, \_SB.PCI0.LPCB.LNKA, 0},
Package() { 0x0001ffff, 3, \_SB.PCI0.LPCB.LNKE, 0},
})
}