UPSTREAM: mainboard/lenovo: Power off USB and mute audio before entering S3

Currently, the USB ports are still powered during S3, so turning
them off may reduce the power consumption.
Note that, when the USB Always on feature is enabled, the USB
ports are always powered, regardless of the USBP state.

This patch also disables the audio, as it might consume some
power or generate some noise.

Both the USB power and the audio are reenabled by coreboot during
the poweron.

BUG=none
BRANCH=none
TEST=none

Change-Id: Iab4aff2c38ee494a5db3b0804f154ecbd4955f75
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 435d307415
Original-Change-Id: If0431b1315fffef2e372e7023f830a66bb7fddae
Original-Signed-off-by: Nicola Corna <nicola@corna.info>
Original-Reviewed-on: https://review.coreboot.org/18464
Original-Tested-by: build bot (Jenkins)
Original-Reviewed-by: Alexander Couzens <lynxis@fe80.eu>
Reviewed-on: https://chromium-review.googlesource.com/449818
This commit is contained in:
Nicola Corna 2017-02-22 16:52:29 +01:00 committed by chrome-bot
commit 5846d19bf9
10 changed files with 20 additions and 0 deletions

View file

@ -24,5 +24,7 @@ Method(_WAK,1)
Method(_PTS,1)
{
\_SB.PCI0.LPCB.EC.MUTE(1)
\_SB.PCI0.LPCB.EC.USBP(0)
\_SB.PCI0.LPCB.EC.RADI(0)
}

View file

@ -22,6 +22,8 @@ Method(_PTS,1)
{
// Call a trap so SMI can prepare for Sleep as well.
// TRAP(0x55)
\_SB.PCI0.LPCB.EC.MUTE(1)
\_SB.PCI0.LPCB.EC.USBP(0)
\_SB.PCI0.LPCB.EC.RADI(0)
}

View file

@ -19,6 +19,8 @@
Method(_PTS,1)
{
\_SB.PCI0.LPCB.EC.MUTE(1)
\_SB.PCI0.LPCB.EC.USBP(0)
\_SB.PCI0.LPCB.EC.RADI(0)
}

View file

@ -19,6 +19,8 @@
Method(_PTS,1)
{
\_SB.PCI0.LPCB.EC.MUTE(1)
\_SB.PCI0.LPCB.EC.USBP(0)
\_SB.PCI0.LPCB.EC.RADI(0)
}

View file

@ -19,6 +19,8 @@
Method(_PTS,1)
{
\_SB.PCI0.LPCB.EC.MUTE(1)
\_SB.PCI0.LPCB.EC.USBP(0)
\_SB.PCI0.LPCB.EC.RADI(0)
}

View file

@ -19,6 +19,8 @@
Method(_PTS,1)
{
\_SB.PCI0.LPCB.EC.MUTE(1)
\_SB.PCI0.LPCB.EC.USBP(0)
\_SB.PCI0.LPCB.EC.RADI(0)
}

View file

@ -19,6 +19,8 @@
Method(_PTS,1)
{
\_SB.PCI0.LPCB.EC.MUTE(1)
\_SB.PCI0.LPCB.EC.USBP(0)
\_SB.PCI0.LPCB.EC.RADI(0)
}

View file

@ -22,6 +22,8 @@ Method(_PTS,1)
{
// Call a trap so SMI can prepare for Sleep as well.
// TRAP(0x55)
\_SB.PCI0.LPCB.EC.MUTE(1)
\_SB.PCI0.LPCB.EC.USBP(0)
\_SB.PCI0.LPCB.EC.RADI(0)
}

View file

@ -19,6 +19,8 @@
Method(_PTS,1)
{
\_SB.PCI0.LPCB.EC.MUTE(1)
\_SB.PCI0.LPCB.EC.USBP(0)
\_SB.PCI0.LPCB.EC.RADI(0)
}

View file

@ -19,6 +19,8 @@
Method(_PTS,1)
{
\_SB.PCI0.LPCB.EC.MUTE(1)
\_SB.PCI0.LPCB.EC.USBP(0)
\_SB.PCI0.LPCB.EC.RADI(0)
}