From 581af941154db8113036eee3f2a5c78fd3625c61 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Micha=C5=82=20Kope=C4=87?= <michal.kopec@3mdeb.com>
Date: Tue, 11 Mar 2025 17:40:55 +0100
Subject: [PATCH] ec/dasharo/ec: Add DTT power and battery participants
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Add DTT Power and Battery participants. These are used by DTT drivers to
more efficiently split power between SoC and dGPU and determine their
power limits.

Change-Id: I1e215366a79c0dd0f8a5d54c33fc718ba6b1302b
Signed-off-by: Michał Kopeć <michal.kopec@3mdeb.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/86820
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-by: Sumeet R.P. <sumeet4linux@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Alicja Michalska <ahplka19@gmail.com>
Reviewed-by: Krystian Hebel <krystian.hebel@3mdeb.com>
---
 src/ec/dasharo/ec/acpi/dtt.asl    | 55 +++++++++++++++++++++++++++++++
 src/ec/dasharo/ec/acpi/ec.asl     |  3 +-
 src/ec/dasharo/ec/acpi/ec_ram.asl |  3 ++
 3 files changed, 60 insertions(+), 1 deletion(-)
 create mode 100644 src/ec/dasharo/ec/acpi/dtt.asl

diff --git a/src/ec/dasharo/ec/acpi/dtt.asl b/src/ec/dasharo/ec/acpi/dtt.asl
new file mode 100644
index 0000000000..1dd85c5896
--- /dev/null
+++ b/src/ec/dasharo/ec/acpi/dtt.asl
@@ -0,0 +1,55 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <soc/dptf.h>
+
+Device (TPWR)
+{
+	Name (_HID, DPTF_TPWR_DEVICE)
+	Name (_UID, "TPWR")
+	Name (_STR, Unicode("Intel DTT Power Participant"))
+
+	Method (_STA, 0, NotSerialized)
+	{
+		Return (0x0F)
+	}
+
+	Name (PTYP, 0x11) // Device is a platform power device
+
+	Method (PSRC, 0) // Power source
+	{
+		Return (^^AC.ACFG)
+	}
+
+	Method (ARTG, 0) // Adapter rating
+	{
+		If (^^PCI0.LPCB.EC0.ECOK)
+		{
+			Return (^^PCI0.LPCB.EC0.APWR)
+		}
+		Else
+		{
+			Return (0)
+		}
+	}
+
+	Method (PBOK, 1) // Power Boss OK
+	{
+		// Notify EC to de-assert PROCHOT#
+		// Required by DTT, but N/A on this hardware, PROCHOT#
+		// is de-asserted by board logic upon AC plug-in
+	}
+}
+
+Device (TBAT)
+{
+	Name (_HID, DPTF_BAT1_DEVICE)
+	Name (_STR, Unicode("Intel DTT Battery Participant"))
+
+	Method (_STA, 0, NotSerialized)
+	{
+		Return (^^BAT0._STA)
+	}
+
+	Name (PTYP, 0x0c) // Device is a platform battery device
+	Name (CTYP, 0x02) // Hybrid Power Boost architecture
+}
diff --git a/src/ec/dasharo/ec/acpi/ec.asl b/src/ec/dasharo/ec/acpi/ec.asl
index e13c52dc39..9044de3240 100644
--- a/src/ec/dasharo/ec/acpi/ec.asl
+++ b/src/ec/dasharo/ec/acpi/ec.asl
@@ -4,9 +4,10 @@ Scope (\_SB) {
 	#include "ac.asl"
 	#include "battery.asl"
 	#include "buttons.asl"
+	#include "dasharo.asl"
+	#include "dtt.asl"
 	#include "hid.asl"
 	#include "lid.asl"
-	#include "dasharo.asl"
 }
 
 Device (\_SB.PCI0.LPCB.EC0)
diff --git a/src/ec/dasharo/ec/acpi/ec_ram.asl b/src/ec/dasharo/ec/acpi/ec_ram.asl
index 008737785b..8cd565cbd4 100644
--- a/src/ec/dasharo/ec/acpi/ec_ram.asl
+++ b/src/ec/dasharo/ec/acpi/ec_ram.asl
@@ -42,6 +42,9 @@ Field (ERAM, ByteAcc, Lock, Preserve)
 	DUT2, 8,	// Fan 2 duty
 	RPM1, 16,	// Fan 1 RPM
 	RPM2, 16,	// Fan 2 RPM
+	Offset (0xD4),
+	GPUD, 8,	// GPU D-notify level
+	APWR, 32,	// AC adapter power
 	Offset (0xD9),
 	AIRP, 8,	// Airplane mode LED
 	WINF, 8,	// Enable ACPI brightness controls