From 57f7e2182ec62a92dfcd6f154b47c8760e784d27 Mon Sep 17 00:00:00 2001 From: Pranava Y N Date: Tue, 1 Apr 2025 15:51:10 +0530 Subject: [PATCH] Revert "mb/google/brya: Enable RTD3 for SSD to resolve S0ix issue" This reverts commit 08076240bdc10894b8e790e4b52adf4344fff261. Reason for revert: Unable to boot to OS on taniks. Enabling RTD3 for pcie_rp9 in the brya baseboard enables it for all variants. pcie_rp9 is being used for eMMC in taniks, taeko and few other variants. This is causing boot failure in these devices. Change-Id: I72270812312db5b2505046f32466cbb4c200947f Signed-off-by: Pranava Y N Reviewed-on: https://review.coreboot.org/c/coreboot/+/87056 Reviewed-by: Jayvik Desai Reviewed-by: Eric Lai Reviewed-by: Subrata Banik Reviewed-by: Kapil Porwal Tested-by: build bot (Jenkins) --- .../google/brya/variants/baseboard/brya/devicetree.cb | 7 ------- 1 file changed, 7 deletions(-) diff --git a/src/mainboard/google/brya/variants/baseboard/brya/devicetree.cb b/src/mainboard/google/brya/variants/baseboard/brya/devicetree.cb index 3a748ea0f1..6160ebf084 100644 --- a/src/mainboard/google/brya/variants/baseboard/brya/devicetree.cb +++ b/src/mainboard/google/brya/variants/baseboard/brya/devicetree.cb @@ -192,13 +192,6 @@ chip soc/intel/alderlake .clk_req = 1, .flags = PCIE_RP_LTR | PCIE_RP_AER, }" - chip soc/intel/common/block/pcie/rtd3 - register "is_storage" = "true" - register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_D11)" - register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_B4)" - register "srcclk_pin" = "1" - device generic 0 on end - end end #PCIE9-12 SSD device ref uart0 on end device ref gspi1 on end