updates from users for ga-6bxc
one or two debugging things for the SBC710 and doc mil
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parent
de68851989
commit
57eaa8b6f2
3 changed files with 62 additions and 5 deletions
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@ -2,16 +2,25 @@
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#include <pci.h>
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#include <cpu/p5/io.h>
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#include <cpu/p5/cpuid.h>
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#include <arch/pirq_routing.h>
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#include <arch/i386_subr.h>
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#include <part/nvram.h>
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#include <subr.h>
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void mainboard_fixup()
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{
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nvram_on();
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intel_display_cpuid();
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intel_mtrr_check();
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//intel_display_cpuid();
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display_cpuid();
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//intel_mtrr_check();
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mtrr_check();
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intel_zero_irq_settings();
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intel_check_irq_routing_table();
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intel_interrupts_on();
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//intel_zero_irq_settings();
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pci_zero_irq_settings();
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//intel_check_irq_routing_table();
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check_pirq_routing_table();
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//intel_interrupts_on();
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interrupts_on();
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}
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@ -59,6 +59,7 @@ fill_inbuf(void)
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post_code(0xd0 + block_count);
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block_count++;
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printk_debug("inbuf[0] is 0x%x\n", inbuf[0]);
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return inbuf[0];
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}
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@ -130,6 +130,53 @@ static void setup_parallel(struct superio *sio)
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}
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}
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// test a non-fifo uart init. Stupid chip.
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/* Line Control Settings */
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#ifndef TTYS0_LCS
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/* Set 8bit, 1 stop bit, no parity */
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#define TTYS0_LCS 0x3
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#endif
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#define UART_LCS TTYS0_LCS
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/* Data */
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#define UART_RBR 0x00
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#define UART_TBR 0x00
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/* Control */
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#define UART_IER 0x01
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#define UART_IIR 0x02
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#define UART_FCR 0x02
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#define UART_LCR 0x03
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#define UART_MCR 0x04
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#define UART_DLL 0x00
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#define UART_DLM 0x01
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/* Status */
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#define UART_LSR 0x05
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#define UART_MSR 0x06
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#define UART_SCR 0x07
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inline void uart_init_nofifo(unsigned base_port, unsigned divisor)
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{
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/* disable interrupts */
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outb(0x0, base_port + UART_IER);
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#if 0
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/* enable fifo's */
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outb(0x01, base_port + UART_FCR);
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#else
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outb(0x06, base_port + UART_FCR);
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#endif
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/* Set Baud Rate Divisor to 12 ==> 115200 Baud */
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outb(0x80 | UART_LCS, base_port + UART_LCR);
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outb(divisor & 0xFF, base_port + UART_DLL);
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outb((divisor >> 8) & 0xFF, base_port + UART_DLM);
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outb(UART_LCS, base_port + UART_LCR);
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}
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static void setup_com(struct superio *sio,
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struct com_ports *com, int device)
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{
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