mb/starlabs/starfighter: Make the memory speed configurable

Let the user chose between 5500, 6400 and 7500MT/s.

Change-Id: I91171f252e83e409904031109ee084115f6b3708
Signed-off-by: Sean Rhodes <sean@starlabs.systems>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/90825
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

src/mainboard/starlabs/starfighter/cfr.c

@@ -12,6 +12,7 @@ static struct sm_obj_form performance_group = {
 	.ui_name = "Performance",
 	.obj_list = (const struct sm_object *[]) {
 		&bluetooth_rtd3,
+		&memory_speed,
 		&fan_mode,
 		&power_profile,
 		NULL

src/mainboard/starlabs/starfighter/spd/16gb-5500.spd.hex

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src/mainboard/starlabs/starfighter/spd/16gb-7500.spd.hex

@@ -0,0 +1,32 @@
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src/mainboard/starlabs/starfighter/spd/32gb-5500.spd.hex

@@ -0,0 +1,32 @@
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src/mainboard/starlabs/starfighter/spd/32gb-7500.spd.hex

@@ -0,0 +1,32 @@
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src/mainboard/starlabs/starfighter/spd/32gb-mtl-5500.spd.hex

@@ -0,0 +1,32 @@
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src/mainboard/starlabs/starfighter/spd/32gb-mtl-7500.spd.hex

@@ -0,0 +1,32 @@
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src/mainboard/starlabs/starfighter/spd/64gb-5500.spd.hex

@@ -0,0 +1,32 @@
+23 10 15 0E 16 2A F9 08 00 40 00 00 09 01 00 00
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src/mainboard/starlabs/starfighter/spd/64gb-6400.spd.hex

@@ -0,0 +1,32 @@
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src/mainboard/starlabs/starfighter/spd/64gb-mtl-5500.spd.hex

@@ -0,0 +1,32 @@
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src/mainboard/starlabs/starfighter/spd/64gb-mtl-6400.spd.hex

@@ -0,0 +1,32 @@
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src/mainboard/starlabs/starfighter/spd/Makefile.mk

@@ -1,10 +1,24 @@
 ## SPDX-License-Identifier: GPL-2.0-only
 
 ifeq ($(CONFIG_BOARD_STARLABS_STARFIGHTER_RPL),y)
-SPD_SOURCES = 16gb # 13
-SPD_SOURCES += 32gb # 0
-SPD_SOURCES += 64gb # 8
+# RPL memory configs (selected by straps) with runtime speed selection.
+# CBFS index order is (per config): 5500, 6400, 7500.
+SPD_SOURCES = 16gb-5500
+SPD_SOURCES += 16gb-6400
+SPD_SOURCES += 16gb-7500
+SPD_SOURCES += 32gb-5500
+SPD_SOURCES += 32gb-6400
+SPD_SOURCES += 32gb-7500
+SPD_SOURCES += 64gb-5500
+SPD_SOURCES += 64gb-6400
+SPD_SOURCES += 64gb-7500
 else
-SPD_SOURCES = 32gb-mtl # 13
-SPD_SOURCES += 64gb-mtl # 0
+# MTL memory configs (selected by straps) with runtime speed selection.
+# CBFS index order is (per config): 5500, 6400, 7500.
+SPD_SOURCES = 32gb-mtl-5500
+SPD_SOURCES += 32gb-mtl-6400
+SPD_SOURCES += 32gb-mtl-7500
+SPD_SOURCES += 64gb-mtl-5500
+SPD_SOURCES += 64gb-mtl-6400
+SPD_SOURCES += 64gb-mtl-7500
 endif

src/mainboard/starlabs/starfighter/variants/mtl/romstage.c

@@ -6,16 +6,23 @@
 #include <types.h>
 #include <variants.h>
 
-static uint8_t strap_to_cbfs_index(uint8_t strap)
+static uint8_t strap_to_memcfg_index(uint8_t strap)
 {
 	switch (strap) {
-	case 13:	// 32GB
+	case 13: /* 32GB */
 		return 0;
-	default:	// 64GB
+	default: /* 64GB */
 		return 1;
 	}
 }
 
+static uint8_t memcfg_and_speed_to_cbfs_index(uint8_t memcfg, unsigned int speed)
+{
+	if (speed > 2)
+		speed = 2;
+	return (uint8_t)(memcfg * 3 + speed);
+}
+
 void mainboard_memory_init_params(FSPM_UPD *mupd)
 {
 	const struct mb_cfg mem_config = {
@@ -82,7 +89,9 @@ void mainboard_memory_init_params(FSPM_UPD *mupd)
 
 	const struct mem_spd lpddr5_spd_info = {
 		.topo = MEM_TOPO_MEMORY_DOWN,
-		.cbfs_index = strap_to_cbfs_index(get_memory_config_straps()),
+		.cbfs_index = memcfg_and_speed_to_cbfs_index(
+			strap_to_memcfg_index(get_memory_config_straps()),
+			get_uint_option("memory_speed", 1)),
 	};
 
 	memcfg_init(mupd, &mem_config, &lpddr5_spd_info, half_populated);

src/mainboard/starlabs/starfighter/variants/rpl/romstage.c

@@ -40,18 +40,25 @@ static uint8_t get_memory_config_straps(void)
 	return (uint8_t)gpio_base2_value(spd_id, ARRAY_SIZE(spd_id));
 }
 
-static uint8_t strap_to_cbfs_index(uint8_t strap)
+static uint8_t strap_to_memcfg_index(uint8_t strap)
 {
 	switch (strap) {
-	case 0:	// 32GB
+	case 0: /* 32GB */
 		return 1;
-	case 8:	// 64GB
+	case 8: /* 64GB */
 		return 2;
-	default:// 16GB
+	default: /* 16GB */
 		return 0;
 	}
 }
 
+static uint8_t memcfg_and_speed_to_cbfs_index(uint8_t memcfg, unsigned int speed)
+{
+	if (speed > 2)
+		speed = 2;
+	return (uint8_t)(memcfg * 3 + speed);
+}
+
 void mainboard_memory_init_params(FSPM_UPD *mupd)
 {
 	const struct mb_cfg mem_config = {
@@ -118,7 +125,9 @@ void mainboard_memory_init_params(FSPM_UPD *mupd)
 
 	const struct mem_spd lpddr5_spd_info = {
 		.topo = MEM_TOPO_MEMORY_DOWN,
-		.cbfs_index = strap_to_cbfs_index(get_memory_config_straps()),
+		.cbfs_index = memcfg_and_speed_to_cbfs_index(
+			strap_to_memcfg_index(get_memory_config_straps()),
+			get_uint_option("memory_speed", 1)),
 	};
 
 	memcfg_init(mupd, &mem_config, &lpddr5_spd_info, half_populated);