From 5778d9f8b2cdb5d7288c6b93c4a673cfb6e55dd1 Mon Sep 17 00:00:00 2001
From: Subrata Banik <subratabanik@google.com>
Date: Tue, 10 Feb 2026 03:21:15 +0000
Subject: [PATCH] soc/intel/pantherlake: Add support for USB wake up
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Add the same wakeup method that Meteor Lake uses to Panther Lake.

TEST=Able to build and boot google/moonstone where able to wake
the device using differnt USB devices like USB FP, KB and Mouse.

Change-Id: Id680b443791c3dbc502d1b6776fd0fa03bd80691
Signed-off-by: Subrata Banik <subratabanik@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/91147
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Ren Kuo <ren.kuo@quanta.corp-partner.google.com>
Reviewed-by: Jérémy Compostella <jeremy.compostella@intel.com>
Reviewed-by: Pranava Y N <pranavayn@google.com>
---
 src/soc/intel/pantherlake/acpi/xhci.asl | 17 +++++++++++++++++
 1 file changed, 17 insertions(+)

diff --git a/src/soc/intel/pantherlake/acpi/xhci.asl b/src/soc/intel/pantherlake/acpi/xhci.asl
index cd3b9f22fe..d1a8919c9b 100644
--- a/src/soc/intel/pantherlake/acpi/xhci.asl
+++ b/src/soc/intel/pantherlake/acpi/xhci.asl
@@ -2,6 +2,9 @@
 
 #include <soc/gpe.h>
 
+/* Include UWES method for enabling USB wake */
+#include <soc/intel/common/acpi/xhci_wake.asl>
+
 /* XHCI Controller 0:14.0 */
 
 Device (XHCI)
@@ -10,6 +13,20 @@ Device (XHCI)
 
 	Name (_PRW, Package () { GPE0_PME_B0, 3 })
 
+	OperationRegion (XPRT, PCI_Config, 0x00, 0x100)
+	Field (XPRT, AnyAcc, NoLock, Preserve)
+	{
+		Offset (0x10),
+		, 16,
+		XMEM, 16,	/* MEM_BASE */
+	}
+
+	Method (_DSW, 3)
+	{
+		UWES ((\U2WE & 0xFFF), PORTSCN_OFFSET, XMEM)
+		UWES ((\U3WE & 0x3F ), PORTSCXUSB3_OFFSET, XMEM)
+	}
+
 	Name (_S3D, 3)	/* D3 supported in S3 */
 	Name (_S0W, 3)	/* D3 can wake device in S0 */
 	Name (_S3W, 3)	/* D3 can wake system from S3 */