diff --git a/src/mainboard/google/fatcat/variants/fatcat/fw_config.c b/src/mainboard/google/fatcat/variants/fatcat/fw_config.c
index ccece4647f..329df7e09a 100644
--- a/src/mainboard/google/fatcat/variants/fatcat/fw_config.c
+++ b/src/mainboard/google/fatcat/variants/fatcat/fw_config.c
@@ -287,12 +287,10 @@ static const struct pad_config wwan_disable_pads[] = {
 /* Gen4 NVME: at the top M.2 slot */
 static const struct pad_config pre_mem_gen4_ssd_pwr_pads[] = {
 	/* GPP_B10:     GEN4_SSD_PWREN */
-	PAD_CFG_GPO(GPP_B10, 0, PLTRST),
+	PAD_CFG_GPO(GPP_B10, 1, PLTRST),
 };
 
 static const struct pad_config gen4_ssd_pads[] = {
-	/* GPP_B10:     GEN4_SSD_PWREN */
-	PAD_CFG_GPO(GPP_B10, 1, PLTRST),
 	/* GPP_B09:     M2_GEN4_SSD_RESET_N */
 	PAD_CFG_GPO(GPP_B09, 1, PLTRST),
 };
@@ -300,7 +298,7 @@ static const struct pad_config gen4_ssd_pads[] = {
 /* Gen5 NVME: at the bottom M.2 slot */
 static const struct pad_config pre_mem_gen5_ssd_pwr_pads[] = {
 	/* GPP_B16:     GEN5_SSD_PWREN */
-	PAD_CFG_GPO(GPP_B16, 0, PLTRST),
+	PAD_CFG_GPO(GPP_B16, 1, PLTRST),
 };
 
 static const struct pad_config gen5_ssd_pads[] = {
@@ -617,15 +615,6 @@ void fw_config_configure_pre_mem_gpio(void)
 	if (!fw_config_probe(FW_CONFIG(CELLULAR, CELLULAR_ABSENT)))
 		GPIO_CONFIGURE_PADS(pre_mem_wwan_pwr_seq1_pads);
 
-	if (fw_config_probe(FW_CONFIG(STORAGE, STORAGE_NVME_GEN4))) {
-		GPIO_CONFIGURE_PADS(pre_mem_gen4_ssd_pwr_pads);
-	} else if (fw_config_probe(FW_CONFIG(STORAGE, STORAGE_NVME_GEN5))) {
-		GPIO_CONFIGURE_PADS(pre_mem_gen5_ssd_pwr_pads);
-	} else if (fw_config_probe(FW_CONFIG(STORAGE, STORAGE_UNKNOWN))) {
-		GPIO_CONFIGURE_PADS(pre_mem_gen4_ssd_pwr_pads);
-		GPIO_CONFIGURE_PADS(pre_mem_gen5_ssd_pwr_pads);
-	}
-
 	if (!fw_config_probe(FW_CONFIG(SD, SD_NONE)))
 		GPIO_CONFIGURE_PADS(pre_mem_x1slot_pads);
 
@@ -645,6 +634,14 @@ void fw_config_configure_pre_mem_gpio(void)
 	if (fw_config_probe(FW_CONFIG(FP, FP_PRESENT)))
 		GPIO_CONFIGURE_PADS(pre_mem_fp_enable_pads);
 
+	if (fw_config_probe(FW_CONFIG(STORAGE, STORAGE_NVME_GEN4))) {
+		GPIO_CONFIGURE_PADS(pre_mem_gen4_ssd_pwr_pads);
+	} else if (fw_config_probe(FW_CONFIG(STORAGE, STORAGE_NVME_GEN5))) {
+		GPIO_CONFIGURE_PADS(pre_mem_gen5_ssd_pwr_pads);
+	} else if (fw_config_probe(FW_CONFIG(STORAGE, STORAGE_UNKNOWN))) {
+		GPIO_CONFIGURE_PADS(pre_mem_gen4_ssd_pwr_pads);
+		GPIO_CONFIGURE_PADS(pre_mem_gen5_ssd_pwr_pads);
+	}
 }
 
 void fw_config_gpio_padbased_override(struct pad_config *padbased_table)
diff --git a/src/mainboard/google/fatcat/variants/fatcat/gpio.c b/src/mainboard/google/fatcat/variants/fatcat/gpio.c
index 13e6bbe1e3..1d12f5629f 100644
--- a/src/mainboard/google/fatcat/variants/fatcat/gpio.c
+++ b/src/mainboard/google/fatcat/variants/fatcat/gpio.c
@@ -366,6 +366,11 @@ static const struct pad_config early_gpio_table[] = {
 	PAD_CFG_NF(GPP_H07, NONE, DEEP, NF1),
 	/* GPP_D15: SPI_TPM_INT_N */
 	PAD_CFG_GPI_APIC(GPP_D15, NONE, PLTRST, LEVEL, INVERT),
+
+	/* GPP_B10:     GEN4_SSD_PWREN */
+	PAD_CFG_GPO(GPP_B10, 0, PLTRST),
+	/* GPP_B16:     GEN5_SSD_PWREN */
+	PAD_CFG_GPO(GPP_B16, 0, PLTRST),
 };
 
 /* Pad configuration in romstage */