From 56dbafcff418d70f7069fd2c805395dbab0c4d84 Mon Sep 17 00:00:00 2001 From: Jeremy Compostella Date: Thu, 28 Aug 2025 15:27:57 -0700 Subject: [PATCH] soc/intel/pantherlake: Remove UFS support Unified Flash Storage (UFS) has been descoped from Panther Lake configurations, limiting UFS functionality to Wildcat Lake. This change removes Panther Lake's UFS configuration options and references, ensuring proper alignment with the current product specifications. BUG=b:442891168 Change-Id: Ib7e7498a57c8fbc924d6dcf70e374611733918c0 Signed-off-by: Jeremy Compostella Reviewed-on: https://review.coreboot.org/c/coreboot/+/88988 Reviewed-by: Subrata Banik Reviewed-by: Wonkyu Kim Tested-by: build bot (Jenkins) Reviewed-by: Cliff Huang Reviewed-by: Jamie Ryu --- src/soc/intel/pantherlake/Kconfig | 1 + src/soc/intel/pantherlake/acpi/southbridge.asl | 2 +- src/soc/intel/pantherlake/chipset_ptl.cb | 1 - src/soc/intel/pantherlake/fsp_params.c | 4 ++-- src/soc/intel/pantherlake/include/soc/pci_devs.h | 2 +- 5 files changed, 5 insertions(+), 5 deletions(-) diff --git a/src/soc/intel/pantherlake/Kconfig b/src/soc/intel/pantherlake/Kconfig index d604edb555..d4c60022f3 100644 --- a/src/soc/intel/pantherlake/Kconfig +++ b/src/soc/intel/pantherlake/Kconfig @@ -453,6 +453,7 @@ config SOC_PHYSICAL_ADDRESS_WIDTH config SOC_INTEL_UFS_CLK_FREQ_HZ int + depends on SOC_INTEL_WILDCATLAKE default 38400000 # Override DEBUG Kconfig to avoid false alarm about stack overflow. diff --git a/src/soc/intel/pantherlake/acpi/southbridge.asl b/src/soc/intel/pantherlake/acpi/southbridge.asl index 302099373d..f2ad16b36b 100644 --- a/src/soc/intel/pantherlake/acpi/southbridge.asl +++ b/src/soc/intel/pantherlake/acpi/southbridge.asl @@ -54,6 +54,6 @@ #endif /* UFS 0:17:0 */ -#if (CONFIG(SOC_INTEL_PANTHERLAKE_U_H) || CONFIG(SOC_INTEL_WILDCATLAKE)) +#if CONFIG(SOC_INTEL_WILDCATLAKE) #include #endif diff --git a/src/soc/intel/pantherlake/chipset_ptl.cb b/src/soc/intel/pantherlake/chipset_ptl.cb index 1b81b739bb..e7cac8dd64 100644 --- a/src/soc/intel/pantherlake/chipset_ptl.cb +++ b/src/soc/intel/pantherlake/chipset_ptl.cb @@ -173,7 +173,6 @@ chip soc/intel/pantherlake device pci 16.1 alias heci2 off end device pci 16.4 alias heci3 off end device pci 16.5 alias heci4 off end - device pci 17.0 alias ufs off end device pci 18.0 alias eheci1 off end device pci 18.1 alias eheci2 off end device pci 18.2 alias eheci3 off end diff --git a/src/soc/intel/pantherlake/fsp_params.c b/src/soc/intel/pantherlake/fsp_params.c index b5dfd4d4df..e423986d53 100644 --- a/src/soc/intel/pantherlake/fsp_params.c +++ b/src/soc/intel/pantherlake/fsp_params.c @@ -212,7 +212,7 @@ static const struct slot_irq_constraints irq_constraints[] = { ANY_PIRQ(PCI_DEVFN_CSE_4), }, }, -#if (CONFIG(SOC_INTEL_PANTHERLAKE_U_H) || CONFIG(SOC_INTEL_WILDCATLAKE)) +#if (CONFIG(SOC_INTEL_WILDCATLAKE)) { .slot = PCI_DEV_SLOT_UFS, .fns = { @@ -741,7 +741,7 @@ static void fill_fsps_iax_params(FSP_S_CONFIG *s_cfg, static void fill_fsps_ufs_params(FSP_S_CONFIG *s_cfg, const struct soc_intel_pantherlake_config *config) { -#if (CONFIG(SOC_INTEL_PANTHERLAKE_U_H) || CONFIG(SOC_INTEL_WILDCATLAKE)) +#if CONFIG(SOC_INTEL_WILDCATLAKE) /* Setting FSP UPD (1,0) to enable controller 0 */ s_cfg->UfsEnable[0] = is_devfn_enabled(PCI_DEVFN_UFS); s_cfg->UfsEnable[1] = 0; diff --git a/src/soc/intel/pantherlake/include/soc/pci_devs.h b/src/soc/intel/pantherlake/include/soc/pci_devs.h index 7dc55e1045..4d7d2301b0 100644 --- a/src/soc/intel/pantherlake/include/soc/pci_devs.h +++ b/src/soc/intel/pantherlake/include/soc/pci_devs.h @@ -150,7 +150,7 @@ #define PCI_DEV_CSE_3 _PCI_DEV(CSE, 4) #define PCI_DEV_CSE_4 _PCI_DEV(CSE, 5) -#if (CONFIG(SOC_INTEL_PANTHERLAKE_U_H) || CONFIG(SOC_INTEL_WILDCATLAKE)) +#if CONFIG(SOC_INTEL_WILDCATLAKE) #define PCI_DEV_SLOT_UFS 0x17 #define PCI_DEVFN_UFS _PCI_DEVFN(UFS, 0) #define PCI_DEV_UFS _PCI_DEV(UFS, 0)