From 56be23114e6dba7e9bc81f6e1387a532aa163844 Mon Sep 17 00:00:00 2001 From: Yidi Lin Date: Mon, 24 Nov 2025 12:22:05 +0800 Subject: [PATCH] mb/google/rauru: Use chromeos-legacy.fmd for Hylia and Navi The recent increase of the RW size to 1756KB (CB:89545) has led to an FMAP incompatibility. This issue arises during testing when both the ToT firmware (which utilizes a new FMAP layout) and the firmware branch-built firmware (which relies on an older FMAP layout) are used on the same device. To address this testing failure and streamline the testing process, the updated FMAP will be exclusively implemented for the new variant. The Navi and Hylia devices will continue to use the legacy FMAP. BUG=b:461559917,b:463050048 TEST=emerge-{rauru,tanjiro} coreboot chromeos-bootimage Change-Id: Icb4a12030f7a2e05757c903b70899c07b92c9875 Signed-off-by: Yidi Lin Reviewed-on: https://review.coreboot.org/c/coreboot/+/90168 Tested-by: build bot (Jenkins) Reviewed-by: Hung-Te Lin Reviewed-by: Yu-Ping Wu Reviewed-by: Chen-Tsung Hsieh --- src/mainboard/google/rauru/Kconfig | 4 ++ .../google/rauru/chromeos-legacy.fmd | 46 +++++++++++++++++++ 2 files changed, 50 insertions(+) create mode 100644 src/mainboard/google/rauru/chromeos-legacy.fmd diff --git a/src/mainboard/google/rauru/Kconfig b/src/mainboard/google/rauru/Kconfig index 2e23681354..7acca4b9e5 100644 --- a/src/mainboard/google/rauru/Kconfig +++ b/src/mainboard/google/rauru/Kconfig @@ -72,4 +72,8 @@ config DRIVER_TPM_I2C_ADDR hex default 0x50 +config FMDFILE + default "src/mainboard/\$(CONFIG_MAINBOARD_DIR)/chromeos-legacy.fmd" if CHROMEOS && (BOARD_GOOGLE_HYLIA || BOARD_GOOGLE_NAVI) + default "src/mainboard/\$(CONFIG_MAINBOARD_DIR)/chromeos.fmd" if CHROMEOS + endif diff --git a/src/mainboard/google/rauru/chromeos-legacy.fmd b/src/mainboard/google/rauru/chromeos-legacy.fmd new file mode 100644 index 0000000000..abf673fa03 --- /dev/null +++ b/src/mainboard/google/rauru/chromeos-legacy.fmd @@ -0,0 +1,46 @@ +# Firmware Layout Description for ChromeOS. +# +# The size and address of every section must be aligned to at least 4K, except: +# RO_FRID, RW_FWID*, GBB, or any unused / padding / CBFS type sections. +# +# 'FMAP' may be found by binary search so its starting address should be better +# aligned to larger values. +# +# For sections to be preserved on update, add (PRESERVE) to individual sections +# instead of a group section; otherwise the preserved data may be wrong if you +# resize or reorder sections inside a group. + +FLASH 8M { + WP_RO@0x0 4M { + RO_SECTION { + BOOTBLOCK 128K + FMAP 4K + COREBOOT(CBFS) + GBB 0x2f00 + RO_FRID 0x100 + } + RO_GSCVD 8K + RO_VPD(PRESERVE) 32K # At least 16K. + } + RW_SECTION_A 1500K { + VBLOCK_A 8K + FW_MAIN_A(CBFS) + RW_FWID_A 0x100 + } + RW_MISC 36K { + RW_VPD(PRESERVE) 8K # At least 8K. + RW_NVRAM(PRESERVE) 8K + RW_MRC_CACHE(PRESERVE) 16K + RW_ELOG(PRESERVE) 4K # ELOG driver hard-coded size in 4K. + } + RW_SECTION_B 1500K { + VBLOCK_B 8K + FW_MAIN_B(CBFS) + RW_FWID_B 0x100 + } + RW_SHARED 36K { # Will be force updated on recovery. + SHARED_DATA 4K # 4K or less for netboot params. + RW_UNUSED + } + RW_LEGACY(CBFS) 1M # Minimal 1M. +}