ipq8064: add dynamic CBMEM support

All what's needed apart from configuring the feature is to provide a
function which would report the top of DRAM address.

BUG=chrome-os-partner:27784
TEST=manual
  . with all other patches applied, the image proceeds all the way to
    trying to download 'fallback/payload'.

Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Change-Id: Ifa586964c931976df1dff354066670463f8e9ee3
Reviewed-on: https://chromium-review.googlesource.com/197897
This commit is contained in:
Vadim Bendebury 2014-05-01 14:45:56 -07:00 committed by chrome-internal-fetch
commit 54fed275fe
4 changed files with 28 additions and 1 deletions

View file

@ -38,6 +38,6 @@ config MAINBOARD_PART_NUMBER
config DRAM_SIZE_MB
int
default 2048
default 512
endif # BOARD_GOOGLE_STORM

View file

@ -7,6 +7,7 @@ config SOC_QC_IPQ806X
select ARM_RAMSTAGE_ARMV7
select ARM_ROMSTAGE_ARMV7
select BOOTBLOCK_CONSOLE
select DYNAMIC_CBMEM
select HAVE_UART_MEMORY_MAPPED
select HAVE_UART_SPECIAL
select SPI_ATOMIC_SEQUENCING

View file

@ -30,6 +30,7 @@ romstage-$(CONFIG_SPI_FLASH) += spi.c
romstage-y += timer.c
romstage-$(CONFIG_CONSOLE_SERIAL_IPQ806X) += uart.c
ramstage-y += cbmem.c
ramstage-y += clock.c
ramstage-y += gpio.c
ramstage-$(CONFIG_SPI_FLASH) += spi.c

View file

@ -0,0 +1,25 @@
/*
* This file is part of the coreboot project.
*
* Copyright 2014 Google Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include <cbmem.h>
void *cbmem_top(void)
{
return (void *)(CONFIG_SYS_SDRAM_BASE + (CONFIG_DRAM_SIZE_MB << 20));
}