ipq8064: add dynamic CBMEM support
All what's needed apart from configuring the feature is to provide a
function which would report the top of DRAM address.
BUG=chrome-os-partner:27784
TEST=manual
. with all other patches applied, the image proceeds all the way to
trying to download 'fallback/payload'.
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Change-Id: Ifa586964c931976df1dff354066670463f8e9ee3
Reviewed-on: https://chromium-review.googlesource.com/197897
This commit is contained in:
parent
6830747eb4
commit
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4 changed files with 28 additions and 1 deletions
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@ -38,6 +38,6 @@ config MAINBOARD_PART_NUMBER
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config DRAM_SIZE_MB
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int
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default 2048
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default 512
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endif # BOARD_GOOGLE_STORM
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@ -7,6 +7,7 @@ config SOC_QC_IPQ806X
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select ARM_RAMSTAGE_ARMV7
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select ARM_ROMSTAGE_ARMV7
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select BOOTBLOCK_CONSOLE
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select DYNAMIC_CBMEM
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select HAVE_UART_MEMORY_MAPPED
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select HAVE_UART_SPECIAL
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select SPI_ATOMIC_SEQUENCING
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@ -30,6 +30,7 @@ romstage-$(CONFIG_SPI_FLASH) += spi.c
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romstage-y += timer.c
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romstage-$(CONFIG_CONSOLE_SERIAL_IPQ806X) += uart.c
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ramstage-y += cbmem.c
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ramstage-y += clock.c
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ramstage-y += gpio.c
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ramstage-$(CONFIG_SPI_FLASH) += spi.c
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25
src/soc/qualcomm/ipq806x/cbmem.c
Normal file
25
src/soc/qualcomm/ipq806x/cbmem.c
Normal file
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@ -0,0 +1,25 @@
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/*
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* This file is part of the coreboot project.
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*
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* Copyright 2014 Google Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include <cbmem.h>
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void *cbmem_top(void)
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{
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return (void *)(CONFIG_SYS_SDRAM_BASE + (CONFIG_DRAM_SIZE_MB << 20));
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}
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