From 54f2652bde037b111e146818f4cf07f3e60e9048 Mon Sep 17 00:00:00 2001 From: Uwe Poeche Date: Tue, 15 Jul 2025 10:47:10 +0200 Subject: [PATCH] mb/siemens/mc_ehl6: Enable auto impedance calibration on GbE 0 Use the default automatic RGMII Output Impedance Calibration on Marvell PHY 88E1512 by using default coreboot driver parameters. TEST=Check signal integrity on RGMII interface on mc_ehl6 mainboard. Change-Id: I6b6d7aeb8ddc4ef4ed297f4147b87d3e81c8a37e Signed-off-by: Uwe Poeche Reviewed-on: https://review.coreboot.org/c/coreboot/+/90088 Tested-by: build bot (Jenkins) Reviewed-by: Kilian Krause Reviewed-by: Mario Scheithauer --- src/mainboard/siemens/mc_ehl/variants/mc_ehl6/devicetree.cb | 3 --- 1 file changed, 3 deletions(-) diff --git a/src/mainboard/siemens/mc_ehl/variants/mc_ehl6/devicetree.cb b/src/mainboard/siemens/mc_ehl/variants/mc_ehl6/devicetree.cb index d1e5debf4f..f035c4adfd 100644 --- a/src/mainboard/siemens/mc_ehl/variants/mc_ehl6/devicetree.cb +++ b/src/mainboard/siemens/mc_ehl/variants/mc_ehl6/devicetree.cb @@ -211,9 +211,6 @@ chip soc/intel/elkhartlake # INTn is not routed to LED[2] pin register "enable_int" = "false" register "downshift_cnt" = "2" - register "force_mos" = "true" - register "pmos_val" = "0xF" - register "nmos_val" = "0xA" device mdio 0 on # PHY address ops m88e1512_ops end