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UPSTREAM: southbridge/intel/i82801ix: transition away from device_t

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Replace the use of the old device_t definition inside
southbridge/intel/i82801ix.

The patch has been tested both with the arch/io.h definition of device_t
enabled and disabled in order to ensure compatibility while the
transaction takes place.

BUG=None
BRANCH=None
TEST=None

Signed-off-by: Antonello Dettori <dev@dettori.io>
Reviewed-on: https://review.coreboot.org/16403
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>

Change-Id: Ibf20e6c08994b09d2a2e68a1a1d38a7a477493aa
Reviewed-on: https://chromium-review.googlesource.com/385008
Commit-Ready: Furquan Shaikh <furquan@chromium.org>
Tested-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
This commit is contained in:
Antonello Dettori 2016-09-01 17:04:14 +02:00 • committed by chrome-bot
commit 52bd94083a
2 changed files with 2 additions and 2 deletions
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2
src/southbridge/intel/i82801ix/early_init.c
View file

@ -19,7 +19,7 @@
void i82801ix_early_init(void)
{
const device_t d31f0 = PCI_DEV(0, 0x1f, 0);
const pci_devfn_t d31f0 = PCI_DEV(0, 0x1f, 0);
/* Set up RCBA. */
pci_write_config32(d31f0, D31F0_RCBA, (uintptr_t)DEFAULT_RCBA | 1);

2
src/southbridge/intel/i82801ix/early_smbus.c
View file

@ -24,7 +24,7 @@
void enable_smbus(void)
{
device_t dev;
pci_devfn_t dev;
/* Set the SMBus device statically. */
dev = PCI_DEV(0x0, 0x1f, 0x3);