From 526af8030846ff7f8ff5a0a56a641118e4abb711 Mon Sep 17 00:00:00 2001 From: Seunghwan Kim Date: Tue, 11 Mar 2025 10:46:12 +0900 Subject: [PATCH] mb/nissa/var/meliks: Support x32 memory configuration Use GPP_E7 level to determine whether x32 memory configuration is supported. BUG=None BRANCH=nissa TEST=FW_NAME=meliks emerge-nissa coreboot Change-Id: Iedaf3c4ff1b025a4d69eca1db32ef743066a4478 Signed-off-by: Seunghwan Kim Reviewed-on: https://review.coreboot.org/c/coreboot/+/86804 Reviewed-by: Subrata Banik Reviewed-by: Eric Lai Tested-by: build bot (Jenkins) --- src/mainboard/google/brya/Kconfig | 1 + src/mainboard/google/brya/variants/meliks/gpio.c | 2 ++ src/mainboard/google/brya/variants/meliks/memory.c | 14 ++++++++++++++ 3 files changed, 17 insertions(+) diff --git a/src/mainboard/google/brya/Kconfig b/src/mainboard/google/brya/Kconfig index 9b730aeedf..91d77ab2b9 100644 --- a/src/mainboard/google/brya/Kconfig +++ b/src/mainboard/google/brya/Kconfig @@ -363,6 +363,7 @@ config BOARD_GOOGLE_MELIKS select BOARD_GOOGLE_BASEBOARD_NISSA select DRIVERS_I2C_DA7219 select DRIVERS_INTEL_MIPI_CAMERA + select ENFORCE_MEM_CHANNEL_DISABLE select SOC_INTEL_TWINLAKE config BOARD_GOOGLE_MITHRAX diff --git a/src/mainboard/google/brya/variants/meliks/gpio.c b/src/mainboard/google/brya/variants/meliks/gpio.c index 431b613c0a..6e11263075 100644 --- a/src/mainboard/google/brya/variants/meliks/gpio.c +++ b/src/mainboard/google/brya/variants/meliks/gpio.c @@ -22,6 +22,8 @@ static const struct pad_config override_gpio_table[] = { /* D8 : SD_CLKREQ_ODL ==> NC */ PAD_NC(GPP_D8, NONE), + /* E7 : NC ==> GPP_E7_STRAP */ + PAD_CFG_GPI_LOCK(GPP_E7, NONE, LOCK_CONFIG), /* E14 : EDP_HPD ==> NC */ PAD_NC(GPP_E14, NONE), /* E20 : HDMI_DDC_SCL ==> NC */ diff --git a/src/mainboard/google/brya/variants/meliks/memory.c b/src/mainboard/google/brya/variants/meliks/memory.c index d7f73fb9a0..7fa58ae21f 100644 --- a/src/mainboard/google/brya/variants/meliks/memory.c +++ b/src/mainboard/google/brya/variants/meliks/memory.c @@ -95,3 +95,17 @@ int variant_memory_sku(void) return gpio_base2_value(spd_gpios, ARRAY_SIZE(spd_gpios)); } + +uint8_t mb_get_channel_disable_mask(void) +{ + /* + * GPP_E7 High -> One RAM Chip + * GPP_E7 Low -> Two RAM Chip + */ + if (gpio_get(GPP_E7)) { + /* Disable all other channels except first two on each controller */ + return (BIT(2) | BIT(3)); + } + + return 0; +}