tree: Drop unused <delay.h>

Change-Id: I265e427254ce9f735e65b0631c43f98bc778a34f
Signed-off-by: Elyes Haouas <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/81812
Reviewed-by: Jonathon Hall <jonathon.hall@puri.sm>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Varshit Pandya <pandyavarshit@gmail.com>
Reviewed-by: Yidi Lin <yidilin@google.com>

src/drivers/spi/issi.c

@@ -3,7 +3,6 @@
 #include <commonlib/helpers.h>
 #include <spi_flash.h>
 #include <spi-generic.h>
-#include <delay.h>
 
 #include "spi_flash_internal.h"
 

src/ec/clevo/it5570e/commands.c

@@ -1,7 +1,6 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
 #include <console/console.h>
-#include <delay.h>
 #include <device/mmio.h>
 #include <ec/acpi/ec.h>
 #include <swab.h>

src/mainboard/google/cherry/mainboard.c

@@ -3,7 +3,6 @@
 #include <boardid.h>
 #include <bootmode.h>
 #include <console/console.h>
-#include <delay.h>
 #include <device/device.h>
 #include <device/mmio.h>
 #include <ec/google/chromeec/ec.h>

src/mainboard/purism/librem_jsl/bootblock.c

@@ -1,7 +1,6 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
 #include <bootblock_common.h>
-#include <delay.h>
 #include <device/pci_ops.h>
 #include <ec/acpi/ec.h>
 #include <gpio.h>

src/northbridge/intel/gm45/thermal.c

@@ -4,7 +4,6 @@
 #include <device/pci_def.h>
 #include <spd.h>
 
-#include "delay.h"
 #include "gm45.h"
 
 void raminit_thermal(const sysinfo_t *sysinfo)

src/northbridge/intel/haswell/native_raminit/raminit_main.c

@@ -3,7 +3,6 @@
 #include <assert.h>
 #include <console/console.h>
 #include <cpu/intel/haswell/haswell.h>
-#include <delay.h>
 #include <device/pci_ops.h>
 #include <northbridge/intel/haswell/chip.h>
 #include <northbridge/intel/haswell/haswell.h>

src/northbridge/intel/haswell/native_raminit/raminit_native.c

@@ -6,7 +6,6 @@
 #include <cf9_reset.h>
 #include <console/console.h>
 #include <cpu/x86/msr.h>
-#include <delay.h>
 #include <device/pci_ops.h>
 #include <mrc_cache.h>
 #include <northbridge/intel/haswell/haswell.h>

src/soc/intel/alderlake/systemagent.c

@@ -11,7 +11,6 @@
 #include <cpu/x86/msr.h>
 #include <device/device.h>
 #include <device/pci.h>
-#include <delay.h>
 #include <intelblocks/cpulib.h>
 #include <intelblocks/msr.h>
 #include <intelblocks/power_limit.h>

src/soc/intel/meteorlake/finalize.c

@@ -4,7 +4,6 @@
 #include <bootstate.h>
 #include <console/console.h>
 #include <cpu/x86/smm.h>
-#include <delay.h>
 #include <device/pci.h>
 #include <gpio.h>
 #include <intelblocks/cse.h>

src/soc/intel/meteorlake/systemagent.c

@@ -5,7 +5,6 @@
 #include <cpu/x86/msr.h>
 #include <device/device.h>
 #include <device/pci.h>
-#include <delay.h>
 #include <intelblocks/cpulib.h>
 #include <intelblocks/msr.h>
 #include <intelblocks/power_limit.h>

src/soc/mediatek/mt8195/pcie.c

@@ -2,7 +2,6 @@
 
 #include <device/mmio.h>
 #include <device/resource.h>
-#include <delay.h>
 #include <gpio.h>
 #include <soc/addressmap.h>
 #include <soc/early_init.h>

src/soc/qualcomm/common/display/mdss.c

@@ -2,7 +2,6 @@
 
 #include <device/mmio.h>
 #include <console/console.h>
-#include <delay.h>
 #include <edid.h>
 #include <soc/clock.h>
 #include <soc/display/mdssreg.h>

src/soc/qualcomm/sc7280/display/edp_aux.c

@@ -3,7 +3,6 @@
 #include <device/mmio.h>
 #include <console/console.h>
 #include <edid.h>
-#include <delay.h>
 #include <timer.h>
 #include <types.h>
 #include <string.h>

src/soc/qualcomm/sc7280/display/edp_phy_7nm.c

@@ -1,7 +1,6 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
 #include <console/console.h>
-#include <delay.h>
 #include <device/mmio.h>
 #include <edid.h>
 #include <soc/clock.h>

src/soc/sifive/fu740/gpio.c

@@ -4,7 +4,6 @@
 #include <soc/gpio.h>
 #include <stdint.h>
 #include <arch/mmio.h>
-#include <delay.h>
 #include <assert.h>
 #include <device/mmio.h>
 #include <gpio.h>

src/soc/sifive/fu740/spi.c

@@ -6,7 +6,6 @@
 #include <soc/spi.h>
 #include <soc/clock.h>
 #include <soc/addressmap.h>
-#include <delay.h>
 #include <lib.h>
 
 #include "spi_internal.h"