From 513899c3c8881d8ae7463a7ac667c564acf7997d Mon Sep 17 00:00:00 2001 From: Alicja Michalska Date: Sun, 1 Mar 2026 02:48:49 +0100 Subject: [PATCH] vc/amd/opensil/phoenix_poc: Adjust headers from Genoa to Phoenix As directory was copied from genoa_poc, we need to adjust headers to correspond to phoenix_poc repository. Change-Id: Id3aeaf6ecf138ea94282ae2a308a45c77ff73b02 Signed-off-by: Alicja Michalska Reviewed-on: https://review.coreboot.org/c/coreboot/+/91481 Reviewed-by: Matt DeVillier Tested-by: build bot (Jenkins) --- src/vendorcode/amd/opensil/phoenix_poc/acpi.c | 2 +- src/vendorcode/amd/opensil/phoenix_poc/memmap.c | 3 +-- src/vendorcode/amd/opensil/phoenix_poc/mpio/chip.c | 4 ++-- .../amd/opensil/phoenix_poc/opensil_config.template | 2 -- src/vendorcode/amd/opensil/phoenix_poc/ramstage.c | 7 +++---- 5 files changed, 7 insertions(+), 11 deletions(-) diff --git a/src/vendorcode/amd/opensil/phoenix_poc/acpi.c b/src/vendorcode/amd/opensil/phoenix_poc/acpi.c index fcdf167c12..75249b064d 100644 --- a/src/vendorcode/amd/opensil/phoenix_poc/acpi.c +++ b/src/vendorcode/amd/opensil/phoenix_poc/acpi.c @@ -4,7 +4,7 @@ #include #include #include -#include +#include #include "../opensil.h" diff --git a/src/vendorcode/amd/opensil/phoenix_poc/memmap.c b/src/vendorcode/amd/opensil/phoenix_poc/memmap.c index eed1be7e5f..a9e8d1d2b7 100644 --- a/src/vendorcode/amd/opensil/phoenix_poc/memmap.c +++ b/src/vendorcode/amd/opensil/phoenix_poc/memmap.c @@ -2,7 +2,7 @@ #include #include // needed above ApobCmn.h -#include +#include #include #include "../opensil.h" @@ -32,7 +32,6 @@ const char *opensil_get_hole_info_type(uint32_t type) {ReservedCxl, "ReservedCxl"}, {ReservedCxlAlignment, "ReservedCxlAlignment"}, {ReservedCpuTmr, "ReservedCpuTmr"}, - {ReservedRasEinj, "ReservedRasEinj"}, {MaxMemoryHoleTypes, "MaxMemoryHoleTypes"}, }; diff --git a/src/vendorcode/amd/opensil/phoenix_poc/mpio/chip.c b/src/vendorcode/amd/opensil/phoenix_poc/mpio/chip.c index 587ab81e02..cdfe29fddd 100644 --- a/src/vendorcode/amd/opensil/phoenix_poc/mpio/chip.c +++ b/src/vendorcode/amd/opensil/phoenix_poc/mpio/chip.c @@ -4,8 +4,8 @@ #include #include #include -#include -#include +#include +#include #include #include diff --git a/src/vendorcode/amd/opensil/phoenix_poc/opensil_config.template b/src/vendorcode/amd/opensil/phoenix_poc/opensil_config.template index 2ddd3b4ec1..a93eaeed6a 100644 --- a/src/vendorcode/amd/opensil/phoenix_poc/opensil_config.template +++ b/src/vendorcode/amd/opensil/phoenix_poc/opensil_config.template @@ -1,5 +1,3 @@ CONFIG_PLAT_APOB_ADDRESS=##APOB_BASE## CONFIG_PSP_BIOS_BIN_BASE=##BIOS_ENTRY_BASE## CONFIG_PSP_BIOS_BIN_SIZE=##BIOS_ENTRY_SIZE## -CONFIG_PLAT_NUMBER_SOCKETS=1 -CONFIG_SOC_F19M10=y diff --git a/src/vendorcode/amd/opensil/phoenix_poc/ramstage.c b/src/vendorcode/amd/opensil/phoenix_poc/ramstage.c index 5a037fecb5..243236a9ab 100644 --- a/src/vendorcode/amd/opensil/phoenix_poc/ramstage.c +++ b/src/vendorcode/amd/opensil/phoenix_poc/ramstage.c @@ -1,14 +1,13 @@ /* SPDX-License-Identifier: GPL-2.0-only */ -#include -#include -#include +#include +#include #include #include #include #include #include -#include +#include #include #include #include