From 5120f6ac73162bdfdbc56f5876070103e8bfe448 Mon Sep 17 00:00:00 2001
From: Sean Rhodes <sean@starlabs.systems>
Date: Tue, 4 Feb 2025 14:13:10 +0000
Subject: [PATCH] mb/starlabs/starbook/mtl: Disable DQS interleaving

This causes FSP-M to fail memory training, so disable it.

Change-Id: I4a3544a153d6d4da95c4d679665d9c92bd04ed87
Signed-off-by: Sean Rhodes <sean@starlabs.systems>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/86268
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
---
 src/mainboard/starlabs/starbook/variants/mtl/romstage.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/src/mainboard/starlabs/starbook/variants/mtl/romstage.c b/src/mainboard/starlabs/starbook/variants/mtl/romstage.c
index 956f9c5cda..14b2664cbd 100644
--- a/src/mainboard/starlabs/starbook/variants/mtl/romstage.c
+++ b/src/mainboard/starlabs/starbook/variants/mtl/romstage.c
@@ -11,6 +11,9 @@ void mainboard_memory_init_params(FSPM_UPD *mupd)
 		.type = MEM_TYPE_DDR5,
 		.ect = false,
 		.UserBd = BOARD_TYPE_MOBILE,
+		.ddr_config = {
+			.dq_pins_interleaved = false,
+		}
 	};
 
 	const bool half_populated = false;